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ATSHA204A Datasheet(PDF) 8 Page - ATMEL Corporation |
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ATSHA204A Datasheet(HTML) 8 Page - ATMEL Corporation |
8 / 82 page ATSHA204A [DATASHEET] Atmel-8885D-CryptoAuth-ATSHA204A-Datasheet_072014 8 Finally, the hash combination (i.e. digest) of a challenge and secret key can be kept on the device and XORed with the contents of a slot to implement an encrypted read (Section 8.5.15, “Read Command”), or it can be XORed with encrypted input data to implement an encrypted write (Section 8.5.18, “Write Command”). Each of these operations can be protected against replay attacks by including a random nonce (Section 8.5.12, “Nonce Command”) in the calculation. All security functions are implemented using the industry-standard SHA-256 secure hash algorithm, which is part of the latest set of high-security cryptographic algorithms recommended by various government agencies and cryptographic experts. Section 13.1, “SHA-256” includes a reference to the algorithm details. If desired, the SHA-256 algorithm can also be included in an HMAC sequence (See Section 8.5.9, “HMAC Command”). The ATSHA204A employs full-sized, 256-bit secret keys to prevent any kind of exhaustive attack. |
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