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INA-54063-BLK Datasheet(PDF) 5 Page - Agilent(Hewlett-Packard) |
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INA-54063-BLK Datasheet(HTML) 5 Page - Agilent(Hewlett-Packard) |
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5 / 10 page  6-167 INA-54063 Applications Information Introduction The INA-54063 is a silicon RFIC amplifier that is designed with an internal resistive feedback network to provide a 50 Ω input and near 75 Ω output impedance. With a 1-dB compressed Output Power of 8 dBm and Noise Figure of 5 dB, the INA-54063 is well suited for amplifier applications requiring high dynamic ranges. A unique feature of the INA-54063 is a positive gain slope over the 1–2 GHz range that is useful in many satellite-based TV and datacom systems. When used for the IF amplifier, the up-slope in the gain of the INA-54063 is intended to compensate for the negative gain slope in many Low Noise Block downconverters (LNB) used in consumer and commercial TV delivery systems, such as DDS, DBS, and TVRO. The positive gain slope can also compensate for the high fre- quency attenuation characteris- tics of 75 Ω cables used to connect the outdoor LNBs to indoor set-top converters. In addition to use in TV delivery systems, the INA-54063 will find many applications in 50 Ω input- 50 Ω output gain and buffer stages in wireless communica- tions systems. Operating Details The INA-54063 is a voltage biased device that operates from a +5 volt power supply with a typical current drain of 29 mA. All bias regulation circuitry is integrated into the RFIC. Figure 9 shows a typical imple- mentation of the INA-54063. The supply voltage for the INA-54063 must be applied to two terminals, the Vcc pin and the RF Output pin. RF INPUT RFC Vd Cblock Cbypass Cblock RF OUTPUT Figure 9. Basic Amplifier Application. The Vd connection to the ampli- fier is RF bypassed by placing a capacitor to ground near the Vd pin of the amplifier package. The power supply connection to the RF Output pin is achieved by means of an RF choke (inductor). The value of the RF choke must be large relative to 50/75 Ω in order to prevent loading of the RF Output. The supply voltage end of the RF choke is bypassed to ground with a capacitor. If the physical layout permits, this can be the same bypass capacitor that is used at the Vd terminal of the amplifier. Blocking capacitors are normally placed in series with the RF Input and the RF Output to isolate the DC voltages on these pins from circuits adjacent to the amplifier. The values for the blocking and bypass capacitors are selected to provide a reactance at the lowest frequency of operation that is small relative to 50 Ω. Example Layout for 50 Ω Amplifier An example layout for an ampli- fier using the INA-54063 with 50 Ω input and 50 Ω output is shown in Figure 10. INPUT OUTPUT INA-5XX63 DEMO BOARD 05/95 Vcc H Figure 10. RF Layout for 50 Ω Input and Output. This example uses a microstripline design (solid groundplane on the back side of the circuit board). The circuit board material is 0.031-inch thick FR-4. Plated through holes (vias) are used to bring the ground to the top side of the circuit where needed. Multiple vias are used to reduce the inductance of the path to ground. Figure 11 shows an assembled amplifier. The +5 volt supply (Vcc) is fed directly into the Vd pin of the INA-54063 and into the RF Output pin through the RF choke (RFC). Capacitor C3 provides RF bypassing for both the Vd pin and the power supply end of the RFC. |
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