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SDIN5D1-2G-L Datasheet(PDF) 20 Page - List of Unclassifed Manufacturers

Part # SDIN5D1-2G-L
Description  Standard and Ultra e.MMC 4.41 I/F
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SDIN5D1-2G-L Datasheet(HTML) 20 Page - List of Unclassifed Manufacturers

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80-36-03462
Interface Description
SanDisk iNAND e.MMC 4.41 I/F - data Sheet
© 2011 SanDisk Corporation
- 20 -
80-36-03462
4.2. Pins and Signal Description
4.2.1. Table 7 contains the SanDisk iNAND, with MMC interface (153 balls),
functional pin assignment.
Table 7
– Functional Pin Assignment, 153 balls
Note: All other pins are not connected [NC] and can be connected to GND or left floating.
Ball No.
Ball Signal
Type
Description
A3
DAT0
I/O
Data I/O: Bidirectional channel used for data transfer
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
M5
CMD
I/O
Command: A bidirectional channel used for device initialization and
command transfers.
M6
CLK
Input
Clock: Each cycle directs a 1-bit transfer on the command and DAT
lines
K5
RST_n
Hardware Reset
E6
VCC
Supply
Flash I/O and memory power supply
F5
VCC
J10
VCC
K9
VCC
C6
VCCQ
Supply
Memory controller core and MMC I/F I/O power supply
M4
VCCQ
N4
VCCQ
P3
VCCQ
P5
VCCQ
E7
VSS
Supply
Flash I/O and memory ground connection
G5
VSS
H10
VSS
K8
VSS
C4
VSSQ
Memory controller core and MMC I/F ground connection
N2
VSSQ
N5
VSSQ
P4
VSSQ
P6
VSSQ
C2
VDDi
Internal power node. Connect 0.1uF capacitor from VDDi to ground


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