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HI-8588PDT Datasheet(PDF) 1 Page - Holt Integrated Circuits |
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HI-8588PDT Datasheet(HTML) 1 Page - Holt Integrated Circuits |
1 / 6 page HI-8588 DESCRIPTION ! ! ! ! ! Direct ARINC 429 line receiver interface ina small outline package Receiver input hystersis at least2 volts Test inputs that bypass analog input and can power down and tri-state outputs Plastic and ceramic package options - surface mount and DIP Mil processing available FEATURES PIN CONFIGURATION SUPPLY VOLTAGES FUNCTION TABLE RINA GND ROUTA ROUTB TESTB TESTA VCC RINB 2 3 4 5 6 7 8 1 vcc = 5.0V± 5% PIN SYMBOL FUNCTION DESCRIPTION VCC SUPPLY 5 VOLT SUPPLY TESTA LOGIC INPUT CMOS RINB ARINC INPUT RECEIVERB INPUT RINA ARINC INPUT RECEIVERA INPUT GND POWER GROUND ROUTA LOGIC OUTPUT RECEIVER CMOS OUTPUT A ROUTB LOGIC OUTPUT RECEIVER CMOS OUTPUT B TESTB LOGIC INPUT CMOS PIN DESCRIPTION TABLE The HI-8588 is an ARINC 429 bus interface receiver and is available ina SO8 pin package. The technology is analog/digital CMOS. The circuitry requires onlya5 volt supply. The ARINC bus can be connected directly to the chip. The typical 10 volt differential signal is translated and input to a window comparator and latch. The comparator levels are just below the standard 6.5 volt minimum ARINC data threshold and just above the standard 2.5 volt maximum ARINC null threshold. The TESTA and TESTB inputs bypass the analog for testing purposes. Also if TESTA and TESTB are both taken high, the analog powers down and the digital outputs tri-state allowing wire-or possibilities. Please refer to the HI-8588-10 for applications where an external resistance in series with the ARINC inputs is required for lightning protection or when the digital outputs need to bea logic zero rather than open circuit when TESTA and TESTB are both high. January 2001 (DS8588 Rev. A) 01/01 HOLT INTEGRATED CIRCUITS 1 |
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