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HT48RA0A Datasheet(PDF) 4 Page - Holtek Semiconductor Inc |
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HT48RA0A Datasheet(HTML) 4 Page - Holtek Semiconductor Inc |
4 / 31 page HT48RA0A Rev. 1.70 4 July 16, 2003 Program Counter - PC The 10-bit program counter (PC) controls the sequence in which the instructions stored in program EPROM are executed and its contents specify a maximum of 1024 addresses. After accessing a program memory word to fetch an in- struction code, the contents of the program counter are incremented by one. The program counter then points to the memory word containing the next instruction code. When executing a jump instruction, conditional skip ex- ecution, loading PCL register, subroutine call, initial re- set or return from subroutine, the PC manipulates the program transfer by loading the address corresponding to each instruction. The conditional skip is activated by instruction. Once the condition is met, the next instruction, fetched during the current instruction execution, is discarded and a dummy cycle replaces it to get the proper instruction. Otherwise proceed with the next instruction. The lower byte of the program counter (PCL) is a read- able and writeable register (06H). Moving data into the PCL performs a short jump. The destination will be within 256 locations. When a control transfer takes place, an additional dummy cycle is required. Program Memory - EPROM The program memory is used to store the program in- structions which are to be executed. It also contains data and table and is organized into 1024 ´14 bits, ad- dressed by the program counter and table pointer. Certain locations in the program memory are reserved for special usage: · Location 000H This area is reserved for the initialization program. Af- ter chip reset, the program always begins execution at location 000H. · Table location Any location in the EPROM space can be used as look-up tables. The instructions TABRDC [m] (the cur- rent page, one page=256 words) and TABRDL [m] (the last page) transfer the contents of the lower-order byte to the specified data memory, and the Mode Program Counter *9 *8 *7 *6 *5 *4 *3 *2 *1 *0 Initial reset 0000000000 Skip PC+2 Loading PCL *9 *8 @7 @6 @5 @4 @3 @2 @1 @0 Jump, call branch #9 #8 #7 #6 #5 #4 #3 #2 #1 #0 Return from subroutine S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 Program counter Note: *9~*0: Program counter bits S9~S0: Stack register bits #9~#0: Instruction code bits @7~@0: PCL bits 0 0 0 H D e v i c e i n i t i a l i z a t i o n p r o g r a m P r o g r a m E R O M 1 4 b i t s L o o k - u p t a b l e ( 2 5 6 w o r d s ) n 0 0 H L o o k - u p t a b l e ( 2 5 6 w o r d s ) 3 F F H N o t e : n r a n g e s f r o m 0 t o 3 n F F H Program memory Instruction(s) Table Location *9 *8 *7 *6 *5 *4 *3 *2 *1 *0 TABRDC [m] P9 P8 @7 @6 @5 @4 @3 @2 @1 @0 TABRDL [m] 1 1 @7 @6 @5 @4 @3 @2 @1 @0 Table location Note: *9~*0: Table location bits @7~@0: Table pointer bits P9~P8: Current program counter bits |
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