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HT48C50- Datasheet(PDF) 10 Page - Holtek Semiconductor Inc |
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HT48C50- Datasheet(HTML) 10 Page - Holtek Semiconductor Inc |
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10 / 45 page  HT48C50-1 10 June 14, 2000 Preliminary Data memory - RAM The data memory is designed with 184´8 bits. The data memory is divided into two func- tional groups: special function registers and general purpose data memory (160´8). Most are read/write, but some are read only. The special function registers include the indi- rect addressing registers (00H, 02H), timer/event counter 0 (TMR0;0DH), timer/event counter 0 control register (TMR0C;0EH), timer/event counter 1 higher order byte register (TMR1H;0FH), timer/event counter 1 lower order byte register (TMR1L;10H), timer/event counter 1 control register (TMR1C;11H), program counter lower-order byte register (PCL;06H), memory pointer registers (MP0;01H, MP1;03H), accu- mulator (ACC;05H), table pointer (TBLP;07H), table higher-order byte register (TBLH;08H), status register (STATUS;0AH), interrupt control register (INTC;0BH), Watch- dog Timer option setting register (WDTS;09H), I/O registers (PA;12H, PB;14H, PC;16H, PD;18H, PG;1EH) and I/O control registers (PAC;13H, PBC;15H, PCC;17H, PDC;19H, PGC;1FH). The remaining space be- fore the 60H is reserved for future expanded usage and reading these locations will get "00H". The general purpose data memory, ad- dressed from 60H to FFH, is used for data and control information under instruction com- mands. All of the data memory areas can handle arith- metic, logic, increment, decrement and rotate operations directly. Except for some dedicated bits, each bit in the data memory can be set and reset by "SET [m].i" and "CLR [m].i". They are also indirectly accessible through memory pointer registers (MP0 or MP1). Indirect addressing register Location 00H and 02H are indirect addressing registers that are not physically implemented. Any read/write operation of [00H] ([02H]) will access data memory pointed to by MP0 (MP1). Reading location 00H (02H) itself indirectly will return the result 00H. Writing indirectly results in no operation. The memory pointer registers (MP0 and MP1) are 8-bit registers. G e ne r al P ur p o s e DA T A M E M O R Y ( 160 B y t e s ) S pec i a l P u r pos e DA T A M E M O R Y 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0A H 0B H 0C H 0D H 0E H 0F H 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1A H 1B H 1C H 1D H 1E H 1F H FF H : U nu s e d R ead a s " 00" 5F H 60H 20H I ndi r e c t A ddr es s i ng R egi s t er 0 MP 0 I ndi r e c t A ddr es s i ng R egi s t er 1 MP 1 AC C PC L TB L P TB L H WD T S ST AT U S IN T C TM R 0 TM R 0 C TM R 1 H TM R 1 L TM R 1 C PA PA C PB PB C PC PC C PD PD C PG PG C RAM mapping |
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