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HN58C1001 Datasheet(PDF) 6 Page - Hitachi Semiconductor

Part # HN58C1001
Description  1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function
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Manufacturer  HITACHI [Hitachi Semiconductor]
Direct Link  http://www.renesas.com/eng
Logo HITACHI - Hitachi Semiconductor

HN58C1001 Datasheet(HTML) 6 Page - Hitachi Semiconductor

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HN58C1001 Series
6
Write Cycle
Parameter
Symbol
Min*
2
Typ
Max
Unit
Test conditions
Address setup time
t
AS
0
——ns
Address hold time
t
AH
150
ns
CE to write setup time (WE controlled)
t
CS
0
——ns
CE hold time (WE controlled)
t
CH
0
——ns
WE to write setup time (CE controlled)
t
WS
0
——ns
WE hold time (CE controlled)
t
WH
0
——ns
OE to write setup time
t
OES
0
——ns
OE hold time
t
OEH
0
——ns
Data setup time
t
DS
100
ns
Data hold time
t
DH
10
——ns
WE pulse width (WE controlled)
t
WP
250
ns
CE pulse width (CE controlled)
t
CW
250
ns
Data latch time
t
DL
300
ns
Byte load cycle
t
BLC
0.55
30
µs
Byte load window
t
BL
100
µs
Write cycle time
t
WC
10*
3
ms
Time to device busy
t
DB
120
ns
Write start time
t
DW
150*
4
——ns
Reset protect time
t
RP
100
µs
Reset high time*
5
t
RES
1—
µs
Notes: 1. t
DF and t DFR are defined as the time at which the outputs achieve the open circuit conditions and are
no longer driven.
2. Use this device in longer cycle than this value.
3. t
WC must be longer than this value unless polling techniques or RDY/Busy are used. This device
automatically completes the internal write operation within this value.
4. Next read or write operation can be initiated after t
DW if polling techniques or RDY/Busy are used.
5. This parameter is sampled and not 100% tested.
6. A7 to A16 are page addresses and must be same within the page write operation.
7. See AC read characteristics.


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