UJA1078ATW datasheet(11/54 Pages) PHILIPS

Part #	UJA1078ATW

Description	High-speed CAN/dual LIN core system basis chip

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Manufacturer	PHILIPS [NXP Semiconductors]

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UJA1078A

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Product data sheet

Rev. 2 — 28 January 2011

11 of 54

NXP Semiconductors

UJA1078A

High-speed CAN/dual LIN core system basis chip

6.2.2 Register map

The first three bits (A2, A1 and A0) of the message header define the register address.

The fourth bit (RO) defines the selected register as read/write or read only.

Fig 4.

SPI timing protocol

SCSN

SCK

01

sampled

floating

015aaa205

X

MSB

14

13

12

01

LSB

MSB

14

13

12

01

LSB

X

SDI

SDO

02

03

04

15

16

Table 3.

Register map

Address bits 15, 14 and 13

Write access bit 12 = 0

Read/Write access bits 11... 0

000

0 = read/write, 1 = read only

WD_and_Status register

001

0 = read/write, 1 = read only

Mode_Control register

010

0 = read/write, 1 = read only

Int_Control register

011

0 = read/write, 1 = read only

Int_Status register

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