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HM6264BLFP-8LT Datasheet(PDF) 11 Page - Hitachi Semiconductor |
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HM6264BLFP-8LT Datasheet(HTML) 11 Page - Hitachi Semiconductor |
11 / 15 page HM6264B Series Write Timing Waveform (2) ( OE Low Fixed) (OE = V IL) tWC tAW tCW tWP tAS tWHZ tOH tOW *2 *1 *3 tDH tDW *4 Address CS1 CS2 Dout Din WE tWR Valid data Valid address High Impedance Notes: 1. If CS1 goes low simultaneously with WE going low or after WE goes low, the outputs remain in high impedance state. 2. Dout is the same phase of the written data in this write cycle. 3. Dout is the read data of the next address. 4. If CS1 is low and CS2 is high during this period, I/O pins are in the output state. Input signals of opposite phase to the outputs must not be applied to I/O pins. |
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