HV574

Features

5.0V CMS Logic

Output voltage up to 80V

Low power level shifting

100MHz equivalent data rate using four dynamic

shift registers

Latched data outputs

Foreward and reverse shifting options (DIR pin)

Diode to VPP allows efficient power recovery

Outputs may be hot switched

Hi-Rel processing available

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Functional Block Diagram

100MHz, 80-Channel Serial to Parallel Converter

with Push-Pull Outputs

General Description

The HV574 is a low-voltage serial to high-voltage parallel con-

verter with push-pull outputs. This device has been designed for

use as a driver for printer applications. It can also be used in any

application requiring multiple output high-voltage current sour-

cing and sinking capability such as driving plasma panels, vac-

uum fluorescent displays, or large matrix LCD displays.

The device has 4 parallel 20-bit dynamic shift registers, permitting

data rates 4X the speed of one (they are clocked together). There

are 80 static latches and control logic to perform the polarity

select and blanking of the outputs. HV

stage of the first shift register through the polarity and blanking

logic. Data is shifted through the shift registers on the logic low

to high transition of the clock. The DIR pin causes CCW shifting

when connected to GND, and CW shifting when connected to

VDD. A data output buffer is provided for cascading devices. This

output reflects the current status of the last bit of the shift register

(HV

(latch enable), BL (blanking), or the POL (polarity) inputs. Transfer

of data from the shift registers to the latches occurs when the LE

(latch enable) input is high. The data in the latches is stored when

LE is low.

POL

VPP

BL

LE

DIR

CLK

20-bit

shift

register

20-bit

shift

register

GND

VDD

20-bit

shift

register

20-bit

shift

register