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HD74ACT112 Datasheet(PDF) 3 Page - Hitachi Semiconductor

Part # HD74ACT112
Description  Dual JK Negative Edge-Triggered Flip-Flop
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Manufacturer  HITACHI [Hitachi Semiconductor]
Direct Link  http://www.renesas.com/eng
Logo HITACHI - Hitachi Semiconductor

HD74ACT112 Datasheet(HTML) 3 Page - Hitachi Semiconductor

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HD74AC112/HD74ACT112
3
Truth Table
Inputs
Outputs
@t
n
@t
n + 1
JK
Q
LL
Qn
LH
L
HL
H
HH
Qn
t
n
:
Bit time before clock pulse.
t
n + 1
:
Bit time after clock pulse.
H
:
High Voltage Level
L
:
Low Voltage Level
Logic Diagram
CD
SD
CP
CP
CP
CP
Q
Q
CP
#
#
#
#
CP
CP
#
CP
CP
CP
CP
J
K
DC Characteristics (unless otherwise specified)
Item
Symbol
Max
Unit
Condition
Maximum quiescent supply current
I
CC
80
µAV
IN = VCC or ground, VCC = 5.5 V,
Ta = Worst case
Maximum quiescent supply current
I
CC
8.0
µAV
IN = VCC or ground, VCC = 5.5 V,
Ta = 25
°C
Maximum additional I
CC/input
(HD74ACT112)
I
CCT
1.5
mA
V
IN = VCC – 2.1 V, VCC = 5.5 V
Ta = Worst case


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