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HB288064C5 Datasheet(PDF) 6 Page - Hitachi Semiconductor |
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HB288064C5 Datasheet(HTML) 6 Page - Hitachi Semiconductor |
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6 / 67 page  HB288256/192/160/128/096/064/032C5 6 Signal name Direction Pin No. Description -CSEL (PC Card Memory mode) I 39 This signal is not used. -CSEL (PC Card I/O mode) -CSEL (True IDE mode) This signal is used to configure this device as a Master or a Slave when configured in the True IDE mode. When this pin is grounded, this device is configured as a Master. When the pin is open, this device is configured as a Slave. D15 to D0 (PC Card Memory mode) I/O 31, 30, 29, 28, 27, 49, 48, 47, 6, 5, 4, 3, 2, 23, 22, 21 Data bus is D15 to D0. D0 is the LSB of the even byte of the word. D8 is the LSB of the odd byte of the word. D15 to D0 (PC Card I/O mode) D15 to D0 (True IDE mode) GND (PC Card Memory mode) — 1, 50 Ground GND (PC Card I/O mode) GND (True IDE mode) -INPACK (PC Card Memory mode) O 43 This signal is not used and should not be connected at the host. -INPACK (PC Card I/O mode) Input Acknowledge This signal is asserted low by this card when the card is selected and responding to an I/O read cycle at the address that is on the address bus during -CE and -IORD are low. This signal is used for the input data buffer control. -INPACK (True IDE mode) This signal is not used and should not be connected at the host. -IORD (PC Card Memory mode) I 34 This signal is not used. -IORD (PC Card I/O mode) -IORD is used for control of read data in I/O task file area. This card does not respond to -IORD until I/O card interface setting up. -IORD (True IDE mode) -IORD is used for control of read data in I/O task file area. This card does not respond to -IORD until True IDE interface setting up. |
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