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XR17D152IM-F Datasheet(PDF) 1 Page - Exar Corporation

Part # XR17D152IM-F
Description  UNIVERSAL (3.3V AND 5V) PCI BUS DUAL UART
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XR17D152IM-F Datasheet(HTML) 1 Page - Exar Corporation

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Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
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XR17D152
UNIVERSAL (3.3V AND 5V) PCI BUS DUAL UART
JUNE 2004
REV. 1.2.0
GENERAL DESCRIPTION
The XR17D1521 (D152) is a monolithic dual PCI Bus
Universal Asynchronous Receiver and Transmitter
(UART) in Exar’s PCI Bus UART family. The device is
designed to meet today’s 32-bit PCI Bus and high
bandwidth requirement in communication systems.
The global interrupt source register provides a
complete interrupt status indication for both channels
to speed up interrupt parsing. Each UART is
independently controlled and has its own 16C550
compatible
5G
(Fifth
Generation)
register
set,
transmit and receive FIFOs of 64 bytes, fully
programmable transmit and receive FIFO trigger
levels, transmit and receive FIFO level counters,
automatic hardware flow control with programmable
hysteresis,
automatic
software
(Xon/Xoff)
flow
control, automatic half-duplex control output, wireless
IrDA (Infrared Data Association) infrared encoder/
decoder, 8 multi-purpose inputs/outputs and a 16-bit
general purpose timer/counter.
NOTE: 1 Covered by U.S. Patents #5,649,122, #5,949,787
APPLICATIONS
Universal PCI Bus Add-in Card
Network Management
Factory Automation and Process Control
Ethernet Network to Serial Ports
Point-of-Sale Systems
Multi serial ports RS-232/RS-422/RS-485 Cards
FEATURES
High Performance Dual PCI UART
Universal PCI Bus Buffers - Auto-sense 3.3V and
5V Operation
32-bit PCI Bus 2.3 Target Signalling Compliance
A Global Interrupt Source Register for both UARTs
Data Transfer in Byte, Word and Double-word
Data Read/Write Burst Operation
Each UART is independently controlled with:
s
16C550 Compatible 5G Register Set
s
64-byte Transmit and Receive FIFOs
s
Transmit and Receive FIFO Level Counters
s
Programmable TX and RX FIFO Trigger Level
s
Automatic RTS/CTS or DTR/DSR Flow Control
s
Automatic Xon/Xoff Software Flow Control
s
Automatic RS485 HDX Control Output with
Selectable Turn-around Delay
s
Infrared (IrDA 1.0) Data Encoder/Decoder
s
Programmable Data Rate with Prescaler
s
Up to 6.25 Mbps Data Rate at 8X Sampling
Eight Multi-Purpose Inputs/outputs
A General Purpose 16-bit Timer/Counter
Sleep Mode with Automatic Wake-up
EEPROM Interface for PCI Configuration
Same package and pin-out as the XR17C152
(14x14x1.0 mm TQFP)
FIGURE 1. BLOCK DIAGRAM
TMRCK
Device
Configuration
Registers
XTAL1
XTAL2
Crystal Osc/Buffer
TX0, RX0, DTR0#,
DSR0#, RTS0#,
CTS0#, CD0#, RI0#
PCI Local
Bus
Interface
CLK (33 MHz)
Configuration
Space
Registers
.
MPIO0- MPIO7
Multi-purpose
Inputs/Outputs
TX1, RX1, DTR1#,
DSR1#, RTS1#,
CTS1#, CD1#, RI1#
16-bit
Timer/Counter
EECK
EEDI
EEDO
EECS
EEPROM
Interface
VCC
(Core Logic)
GND
ENIR
UART Channel 0
64 Byte TX F IFO
64 Byte RX FIFO
BR G
IR
EN DEC
TX & R X
UA RT
Re gs
UART Channel 1
64 Byte TX F IFO
64 Byte RX FIFO
BR G
IR
EN DEC
TX & R X
UA RT
Re gs
EN485#
3.3V or 5V
(PCI VI/O
Power Supply)
RST#
AD[31:0]
C/BE[3:0]#
PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
IDSEL
PERR#
SERR#
INTA#


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