L5150CJ datasheet(6/34 Pages) STMICROELECTRONICS

Part #	L5150CJ

Description	5 V low dropout voltage regulator

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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6 / 34 page

Block diagram and pins description

L5150CJ / L5150CS

6/34

Doc ID 15542 Rev. 15

Table 2.

Pins description

Pin name

PowerSSO-12

pin #

SO-8

pin #

Function

Res_Adj

18

Reset adjustable threshold. Connected to an

appropriate external voltage divider, it allows to

properly set the reset threshold down to 3.5 V.

Connect to GND if not needed.

Res

21

Reset output. Internally connected to Vo through a

20 K

Ω pull up resistor. This pin is pulled low when

Vo <Vo_th. Keep open if not needed.

Vcr

32

Reset delay. Connect an external capacitor between

Vcr pin and ground to adjust the reset delay time.

Keep open if not needed.

GND

4

3

Ground reference.

NC

5, 11, 8, 9

-

Not connected.

Vo

64

5 V regulated output. Block to GND with a ceramic

capacitor (Co ≥ 220 nF for regulator stability).

VS

75

Supply voltage, block directly to GND on the IC with a

capacitor.

EWi

10

6

Early warning input. This pin monitors the VS voltage

level through a resistor divider. Connect to VS if not

needed.

EWo

12

7

Early warning output. Internally connected to Vo

through 20 K

Ω pull up resistor. This pin is pulled low

when EWi is below bandgap reference voltage. Keep

open if not needed.

TAB

-

TAB is connected to the substrate of the chip: connect

toGND or leave open (see Figure 2 for PowerSSO-12

only).

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