Flat panel sensor

C7942CA, C7943CA

External mode

KACCC0139EB

1 × 1 mode (Typ.)

Parameter

Symbol

Value

Unit

Delay time (only external trigger mode)

Tvd

390

µs

Cycle time

Tvc

470

ms

Vsync

Dummy pulse width

Tvdpw

770

µs

Delay time

Thd

1.4

µs

Cycle time

Thc

190

µs

Hsync

Dummy pulse width

Thdpw

35

µs

Delay time

Tpd

65

ns

Cycle time

Tpc

66

ns

Pulse width

Tppw

33

ns

Pclk

Delay time between each block

Tpdb

200

ns

Delay time

Tdd

34

ns

Data1-12

Cycle time

Tdc

66

ns

2 × 2 mode (Typ.)

Parameter

Symbol

Value

Unit

Delay time (only external trigger mode)

Tvd

390

µs

Cycle time

Tvc

230

ms

Vsync

Dummy pulse width

Tvdpw

770

µs

Delay time

Thd

1.4

µs

Cycle time

Thc

190

µs

Hsync

Dummy pulse width

Thdpw

110

µs

Delay time

Tpd

65

ns

Cycle time

Tpc

66

ns

Pulse width

Tppw

33

ns

Pclk

Delay time between each block

Tpdb

200

ns

Delay time

Tdd

34

ns

Data1-12

Cycle time

Tdc

66

ns

4 × 4 mode (Typ.)

Parameter

Symbol

Value

Unit

Delay time (only external trigger mode)

Tvd

390

µs

Cycle time

Tvc

117

ms

Vsync

Dummy pulse width

Tvdpw

770

µs

Delay time

Thd

1.4

µs

Cycle time

Thc

190

µs

Hsync

Dummy pulse width

Thdpw

150

µs

Delay time

Tpd

65

ns

Cycle time

Tpc

66

ns

Pulse width

Tppw

33

ns

Pclk

Delay time between each block

Tpdb

200

ns

Delay time

Tdd

34

ns

Data1-12

Cycle time

Tdc

66

ns

Note) The numbers of siginificant figures is two. (except Tvc)

RECOMMENDATION: 50 % OF FRAME TIME

FROM Tvc TO 10 s

Tvc - Tvdpw

Tvd

ExtTrg

(TTL)

Vsync+

(RS-422)

Hsync+, Pclk and Data 1-12 are the same as internal trigger mode.

C7942CA

3