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TLV1562 Datasheet(PDF) 5 Page - Texas Instruments |
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TLV1562 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 42 page TLV1562 2.7 V TO 5.5 V, HIGH-SPEED LOW-POWER RECONFIGURABLE ANALOG-TO-DIGITAL CONVERTER WITH 4-INPUT, DUAL S/H, PARALLEL INTERFACE, AND POWER DOWN SLAS162 – SEPTEMBER 1998 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 control register The TLV1562 is software configurable. The first two bits, MSBs (D9,8), are used to address the register set. The rest of the 8 bits are used as data. There are two control registers, CR0 and CR1, for user configuration. All of these register bits are written to the control register during a write cycle. A description of the control registers and the input/output data formats are shown in Figure 1. Pin D9 Index1 Pin D8 Index0 Pin D7 Pin D6 CR0 0 Offset Calibration Set OMS(1,0) 0,0 = Operate with calibration 0,1 = Measure system offset 1,0 = Measure internal offset 1,1 = Operate without calibration 0 0 1 Input Data Format Pin D9 Pin D8 Pin D7 Pin D6 Pin D5 Pin D4 Pin D3 Pin D2 Pin D1 Pin D0 Output Data Format 10-Bit Conversion Result 4-Bit Conversion Result 8-Bit Conversion Result CR1 D(5,4) = 0,0 OD9 OD3 OD7 CR1 MSB OD8 OD7 OD6 OD5 OD4 OD3 OD2 OD1 OD0 LSB OD2 OD1 OD0 Z Z Z Z Z Z OD6 OD5 OD4 OD3 OD2 OD1 OD0 Z Z MSB LSB MSB LSB Conversion Clock Select 0 = Internal 1 = External Input Type: 0 = Single end 1 = Differential Conversion Mode Select MS(1,0) 0,0 = Mono interrupt 0,1 = Dual interrupt 1,0 = Mono continuous 1,1 = Dual continuous Channel Select CS(1,0) 0,0 = Ch1 or pair A 0,1 = Ch2 or pair A 1,0 = Ch3 or pair B 1,1 = Ch4 or pair B System Offset Calibration: Short the system input to the system AGND Internal Offset Calibration: Short the two inputs to the S/HA to AGND 0 Interrupt-Mode Conversion Started 0 = By RD 1 = By CSTART Resolution Select BS(1,0) 0,0 = 10-Bit 0,1 = 4-Bit 1.0 = 8-Bit 1.1 = 12-Bit Test 0 Output Format 0 = 2’s Complement 1 = Binary Interrupt-Mode Auto Power Down 0 = Disabled 1 = Enabled SW Power Down 0 = Normal 1 = S/W Power Down Register Index Configuration Register Content Configuration Result CR1 D(5,4) = 0,1 CR1 D(5,4) = 1,0 Reference delta should be greater than 2 V when swing is reduced. NOTE: Z indicates bits write zero read zero back. Pin D5 Pin D4 Pin D3 Pin D2 Pin D1 Pin D0 Figure 1. Input/Output Data Formats NOTE: Channel select bits CR0.(1,0), CS(1,0) are ignored when the device is in the dual (interrupt or continuous) modes using differential inputs, since both differential input pairs are automatically selected. CR0.0 (i.e., CS0 bit) is used to determine if channels 1 and 3 or channels 2 and 4 are selected if single-ended input mode is used. |
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