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ADS8422IPFBT Datasheet(PDF) 5 Page - Texas Instruments |
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ADS8422IPFBT Datasheet(HTML) 5 Page - Texas Instruments |
5 / 29 page www.ti.com SPECIFICATIONS (Continued) ADS8422 SLAS512B – JUNE 2006 – REVISED DECEMBER 2006 T A = –40°C to 85°C, +VA = 5 V, +VAREG = 5 V to 3 V, +VBD = 5 V to 2.7 V, fSAMPLE = 4 MSPS, Vref = 4.096 V (measured with internal reference buffer) (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DIGITAL INPUT/OUTPUT Logic family – CMOS VIH IIH = 5 µA 0.75 ×(+VBD) +VBD + 0.3 VIL IIL = 5 µA –0.3 0.8 Logic level V VOH IOH = 2 TTL loads +VBD – 0.6 VOL IOL = 2 TTL loads 0.4 Data format – Twos complement POWER SUPPLY REQUIREMENTS +VA 4.75 5 5.25 Power supply voltage +VAREG 2.85 3.0 5.25 V +VBD 2.7 3.0 5.25 +VA +VA = 5 V, PD1 = 1, PD2 = 1 24 27 mA +VAREG = 5 V, PD1 = 1, PD2 = 1 12 14 +VAREG mA Supply current +VAREG = 3 V, PD1 = 1, PD2 = 1 12 14 +VBD = 3 V, 10 pF/pin 0.55 +VBD(1) mA +VBD = 5 V, 20 pF/pin 1.8 POWER DOWN(2) +VA 2.5 3.4 mA Supply current PD1 = 0, PD2 = 1, +VA = 5 V +VAREG 5 µA Power 17 mW Power-up time (PD1, PD2) : (0,1) → (1,1) 5 µs +VA 5 Supply current PD1 = 0, PD2 = 0 µ A +VAREG 5 Power 40 µW (PD1, PD2) : (0,0) → (1,1) , 1-µF Storage 25 Power-up time ms capacitor from REFOUT to AGND TEMPERATURE RANGE Operating free-air –40 85 °C (1) This includes the current required for charging the external load capacitance on the digital outputs and is measured with four digital outputs toggling at the same time. (2) (PD1 , PD2 ) = (1,0) is reserved. Do not use this power-down pins combination. 5 Submit Documentation Feedback |
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