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ADS8862IDRCT Datasheet(PDF) 5 Page - Texas Instruments |
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ADS8862IDRCT Datasheet(HTML) 5 Page - Texas Instruments |
5 / 46 page D15 D14 D1 D0 1 2 15 16 D2 D13 14 DOUT SCLK CONVST 3 1/fsample tACQ tconv-max twh-CNV-min td-CNV-DO th-CK-DO td-CK-DO tSCLK tclkl tclkh tquiet td-CK-DOhz DIN = HIGH ADS8862 www.ti.com SBAS570A – MAY 2013 – REVISED DECEMBER 2013 TIMING CHARACTERISTICS 3-WIRE OPERATION Figure 1. 3-Wire Operation: CONVST Functions as Chip Select NOTE Figure 1 shows the timing diagram for the 3-Wire CS Mode Without a Busy Indicator interface option. However, the timing parameters specified in Table 1 are also applicable for the 3-Wire CS Mode With a Busy Indicator interface option, unless otherwise specified. Refer to the Digital Interface section for specific details for each interface option. Table 1. TIMING REQUIREMENTS: 3-Wire Operation(1) PARAMETER MIN TYP MAX UNIT tACQ Acquisition time 540 ns tconv Conversion time 500 930 ns 1/fsample Time between conversions 1470 ns twh-CNV Pulse duration: CONVST high 10 ns fSCLK SCLK frequency 32 MHz tSCLK SCLK period 31.2 ns tclkl SCLK low time 0.45 0.55 tSCLK tclkh SCLK high time 0.45 0.55 tSCLK th-CK-DO SCLK falling edge to current data invalid 3 ns td-CK-DO SCLK falling edge to next data valid delay 13.4 ns td-CNV-DO Enable time: CONVST low to MSB valid 12.3 ns td-CNV-DOhz Disable time: CONVST high or last SCLK falling edge to DOUT 3-state (CS mode) 13.2 ns tquiet Quiet time 20 ns (1) All specifications are at TA = –40°C to +85°C, AVDD = 3 V, and DVDD = 3 V, unless otherwise noted. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: ADS8862 |
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