ADS1000A1IDBVTG4 datasheet(7/23 Pages) TI1

Part #	ADS1000A1IDBVTG4

Description	LOW-POWER, 12-Bit ANALOG-TO-DIGITAL CONVERTER with I2C??INTERFACE

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t

(BUF)

t

(HDSTA)

t

(LOW)

t

R

t

F

t

(HDDAT)

t

(HIGH)

t

(SUSTA)

t

(SUDAT)

t

(HDSTA)

t

(SUSTO)

SCL

SDA

P

S

P

ADS1000

SBAS357A – SEPTEMBER 2006 – REVISED OCTOBER 2007

Figure 6. I2C Timing Diagram

Table 1. Timing Diagram Definitions

FAST MODE

HIGH-SPEED MODE

PARAMETER

MIN

MAX

MIN

MAX

UNITS

SCLK Operating Frequency

f(SCLK)

0.4

3.4

MHz

Bus Free Time Between STOP and START

t(BUF)

600

160

ns

Condition

Hold Time After Repeated START Condition.

t(HDSTA)

600

160

ns

After this period, the first clock is generated.

Repeated START Condition Setup Time

t(SUSTA)

600

160

ns

STOP Condition Setup Time

t(SUSTO)

600

160

ns

Data Hold Time

t(HDDAT)

0

ns

Data Setup Time

t(SUDAT)

100

10

ns

SCLK Clock Low Period

t(LOW)

1300

160

ns

SCLK Clock High Period

t(HIGH)

600

60

ns

Clock/Data Fall Time

tF

300

160

ns

Clock/Data Rise Time

tR

300

160

ns

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