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ADS1240E1K Datasheet(PDF) 5 Page - Texas Instruments |
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ADS1240E1K Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 31 page  ADS1240, 1241 5 SBAS173F www.ti.com PIN CONFIGURATION (ADS1240) PIN NUMBER NAME DESCRIPTION 1DVDD Digital Power Supply 2 DGND Digital Ground 3XIN Clock Input 4XOUT Clock Output, used with external crystals. 5 RESET Active LOW, resets the entire device. 6 DSYNC Active LOW, Synchronization Control 7 PDWN Active LOW, Power Down. The power down func- tion shuts down the analog and digital circuits. 8 DGND Digital Ground 9VREF+ Positive Differential Reference Input 10 VREF– Negative Differential Reference Input 11 AIN0/D0 Analog Input 0 / Data I/O 0 12 AIN1/D1 Analog Input 1 / Data I/O 1 13 AIN2/D2 Analog Input 2 / Data I/O 2 14 AIN3/D3 Analog Input 3 / Data I/O 3 15 AINCOM Analog Input Common, connect to AGND if unused. 16 AGND Analog Ground 17 AVDD Analog Power Supply 18 POL Serial Clock Polarity 19 CS Active LOW, Chip Select 20 DIN Serial Data Input, Schmitt Trigger 21 DOUT Serial Data Output 22 SCLK Serial Clock, Schmitt Trigger 23 DRDY Active LOW, Data Ready 24 BUFEN Buffer Enable PIN DESCRIPTIONS (ADS1240) ADS1240 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 DV DD DGND X IN X OUT RESET DSYNC PDWN DGND V REF+ V REF– A IN0/D0 A IN1/D1 BUFEN DRDY SCLK D OUT D IN CS POL AV DD AGND A INCOM A IN3/D3 A IN2/D2 PIN CONFIGURATION (ADS1241) ADS1241 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 DV DD DGND X IN X OUT RESET DSYNC PDWN DGND V REF+ V REF– A IN0/D0 A IN1/D1 A IN4/D4 A IN5/D5 BUFEN DRDY SCLK D OUT D IN CS POL AV DD AGND A INCOM A IN3/D3 A IN2/D2 A IN7/D7 A IN6/D6 PIN NUMBER NAME DESCRIPTION 1DVDD Digital Power Supply 2 DGND Digital Ground 3XIN Clock Input 4XOUT Clock Output, used with external crystals. 5 RESET Active LOW, resets the entire device. 6 DSYNC Active LOW, Synchronization Control 7 PDWN Active LOW, Power Down. The power down func- tion shuts down the analog and digital circuits. 8 DGND Digital Ground 9VREF+ Positive Differential Reference Input 10 VREF– Negative Differential Reference Input 11 AIN0/D0 Analog Input 0 / Data I/O 0 12 AIN1/D1 Analog Input 1 / Data I/O 1 13 AIN4/D4 Analog Input 4 / Data I/O 4 14 AIN5/D5 Analog Input 5 / Data I/O 5 15 AIN6/D6 Analog Input 6 / Data I/O 6 16 AIN7/D7 Analog Input 7 / Data I/O 7 17 AIN2/D2 Analog Input 2 / Data I/O 2 18 AIN3/D3 Analog Input 3 / Data I/O 3 19 AINCOM Analog Input Common, connect to AGND if unused. 20 AGND Analog Ground 21 AVDD Analog Power Supply 22 POL Serial Clock Polarity 23 CS Active LOW, Chip Select 24 DIN Serial Data Input, Schmitt Trigger 25 DOUT Serial Data Output 26 SCLK Serial Clock, Schmitt Trigger 27 DRDY Active LOW, Data Ready 28 BUFEN Buffer Enable PIN DESCRIPTIONS (ADS1241) Top View SSOP Top View SSOP |
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