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MSP430F2011IN Datasheet(PDF) 10 Page - Texas Instruments |
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MSP430F2011IN Datasheet(HTML) 10 Page - Texas Instruments |
10 / 94 page MSP430F20x3 MSP430F20x2 MSP430F20x1 SLAS491I – AUGUST 2005 – REVISED DECEMBER 2012 www.ti.com Table 4. Terminal Functions, MSP430F20x3 TERMINAL NO. DESCRIPTION NAME I/O PW, N RSA General-purpose digital I/O pin Timer_A, clock signal TACLK input P1.0/TACLK/ACLK/A0+ 2 1 I/O ACLK signal output SD16_A positive analog input A0 General-purpose digital I/O pin Timer_A, capture: CCI0A input, compare: Out0 output P1.1/TA0/A0-/A4+ 3 2 I/O SD16_A negative analog input A0 SD16_A positive analog input A4 General-purpose digital I/O pin Timer_A, capture: CCI1A input, compare: Out1 output P1.2/TA1/A1+/A4- 4 3 I/O SD16_A positive analog input A1 SD16_A negative analog input A4 General-purpose digital I/O pin Input for an external reference voltage/internal reference voltage output (can be P1.3/VREF/A1- 5 4 I/O used as mid-voltage) SD16_A negative analog input A1 General-purpose digital I/O pin SMCLK signal output P1.4/SMCLK/A2+/TCK 6 5 I/O SD16_A positive analog input A2 JTAG test clock, input terminal for device programming and test General-purpose digital I/O pin Timer_A, compare: Out0 output P1.5/TA0/A2-/SCLK/TMS 7 6 I/O SD16_A negative analog input A2 USI: external clock input in SPI or I2C mode; clock output in SPI mode JTAG test mode select, input terminal for device programming and test General-purpose digital I/O pin Timer_A, capture: CCI1B input, compare: Out1 output P1.6/TA1/A3+/SDO/SCL/ 8 7 I/O SD16_A positive analog input A3 TDI/TCLK USI: Data output in SPI mode; I2C clock in I2C mode JTAG test data input or test clock input during programming and test General-purpose digital I/O pin P1.7/A3-/SDI/SDA/ SD16_A negative analog input A3 9 8 I/O TDO/TDI(1) USI: Data input in SPI mode; I2C data in I2C mode JTAG test data output terminal or test data input during programming and test Input terminal of crystal oscillator XIN/P2.6/TA1 13 12 I/O General-purpose digital I/O pin Timer_A, compare: Out1 output Output terminal of crystal oscillator XOUT/P2.7 12 11 I/O General-purpose digital I/O pin(2) Reset or nonmaskable interrupt input RST/NMI/SBWTDIO 10 9 I Spy-Bi-Wire test data input/output during programming and test Selects test mode for JTAG pins on Port 1. The device protection fuse is TEST/SBWTCK 11 10 I connected to TEST. Spy-Bi-Wire test clock input during programming and test VCC 1 NA Supply voltage VSS 14 NA Ground reference DVCC NA 16 Digital supply voltage AVCC NA 15 Analog supply voltage DVSS NA 14 Digital ground reference AVSS NA 13 Analog ground reference QFN Pad NA Pad NA QFN package pad. Connection to VSS is recommended. (1) TDO or TDI is selected via JTAG instruction. (2) If XOUT/P2.7 is used as an input, excess current flows until P2SEL.7 is cleared. This is due to the oscillator output driver connection to this pad after reset. 10 Submit Documentation Feedback Copyright © 2005–2012, Texas Instruments Incorporated |
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