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MB90F543 Datasheet(PDF) 8 Page - Fujitsu Component Limited. |
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MB90F543 Datasheet(HTML) 8 Page - Fujitsu Component Limited. |
8 / 56 page MB90540/545 Series 8 14 P34 I General I/O port with programmable pullup. This function is enabled in the single-chip mode or when the hold function is disabled. HRQ Hold request input pin. This function is enabled when both the exter- nal bus and the hold functions are enabled. 15 P35 I General I/O port with programmable pullup. This function is enabled in the single-chip mode or when the hold function is disabled. HAK Hold acknowledge output pin. This function is enabled when both the external bus and the hold functions are enabled. 16 P36 I General I/O port with programmable pullup. This function is enabled in the single-chip mode or when the external ready function is dis- abled. RDY Ready input pin. This function is enabled when both the external bus and the external ready functions are enabled. 17 P37 H General I/O port with programmable pullup. This function is enabled in the single-chip mode or when the clock output is disabled. CLK CLK output pin. This function is enabled when both the external bus and CLK outputs are enabled. 18 P40 G General I/O port. This function is enabled when UART0 disables the serial data output. SOT0 Serial data output pin for UART0. This function is enabled when UART0 enables the serial data output. 19 P41 G General I/O port. This function is enabled when UART0 disables clock output. SCK0 Clock I/O pin for UART0. This function is enabled when UART0 en- ables the clock output. 20 P42 G General I/O port. This function is always enabled. SIN0 Serial data input pin for UART0. While UART0 is operating for input, the input of the pin is used as required. Except when the function is intentionally used, output from the other functions must be stopped. 21 P43 G General I/O port. This function is always enabled. SIN1 Serial data input pin for UART1. While UART1 is operating for input, the input of the pin is used as required. Except when the function is intentionally used, output from the other functions must be stopped. 22 P44 G General I/O port. This function is enabled when UART1 disables the clock output. SCK1 Clock pulse input/output pin for UART1. This function is enabled when UART1 enables the clock output. 24 P45 G General I/O port. This function is enabled when UART1 disables the serial data output. SOT1 Serial data output pin for UART1. This function is enabled when UART1 enables the serial data output. No. Pin name Circuit type Function (Continued) |
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