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MSP430F5244 Datasheet(PDF) 5 Page - Texas Instruments |
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MSP430F5244 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 108 page  Unified Clock System 128KB 64KB Flash 8KB 4KB RAM MCLK ACLK SMCLK CPUXV2 and Working Registers EEM (S: 3+1) XIN XOUT JTAG/ SBW Interface DMA 3 Channel XT2IN XT2OUT Power Management LDO SVM/SVS Brownout SYS Watchdog Port Map Control (P4) MPY32 TA0 Timer_A 5 CC Registers TA1 Timer_A 3 CC Registers TB0 Timer_B 7 CC Registers RTC_A CRC16 ADC10_A 200 KSPS 10 Channels (8 ext/2 int) 10 Bit TA2 Timer_A 3 CC Registers REF MAB MDB COMP_B 6 Channels USCI0,1 USCI_Ax: UART, IrDA, SPI USCI_Bx: SPI, I2C PA PB PC P1.x P2.x P3.x P4.x P5.x P6.x PJ PJ.x DVCC DVSS RST/NMI VCORE AVCC AVSS RSTDVCC P4 1×7 I/Os P5 1×6 I/Os P6 1×6 I/Os PJ 1×4 I/Os P2 1×1 I/Os P1 1×8 I/Os I/O Ports Interrupt & Wakeup PA 1×9 I/Os P3 1×5 I/Os PB 1×12 I/Os PC 1×12 I/Os I/O Ports MSP430F5249, MSP430F5247, MSP430F5244, MSP430F5242 MSP430F5239, MSP430F5237, MSP430F5234, MSP430F5232 www.ti.com SLAS897 – SEPTEMBER 2013 Functional Block Diagram – F5244, F5242 – RGZ Package Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: MSP430F5249 MSP430F5247 MSP430F5244 MSP430F5242 MSP430F5239 MSP430F5237 MSP430F5234 MSP430F5232 |
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Similar Description - MSP430F5244 |
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