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MSP430F5256 Datasheet(PDF) 9 Page - Texas Instruments |
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MSP430F5256 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 107 page  MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256 MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252 www.ti.com SLAS903A – MAY 2013 – REVISED JULY 2013 Table 3. Terminal Functions (continued) TERMINAL NO. I/O(1) DESCRIPTION NAME RGC ZQE YFF General-purpose digital I/O with port interrupt P1.4/TA0.3(4) 22 H4 C5 I/O TA0 CCR3 capture: CCI3A input compare: Out3 output General-purpose digital I/O with port interrupt P1.5/TA0.4(4) 23 J4 D8 I/O TA0 CCR4 capture: CCI4A input, compare: Out4 output General-purpose digital I/O with port interrupt P1.6/TA1CLK/CBOUT(4) 24 G5 D7 I/O TA1 clock signal TA1CLK input Comparator_B output General-purpose digital I/O with port interrupt P1.7/TA1.0(4) 25 H5 D6 I/O TA1 CCR0 capture: CCI0A input, compare: Out0 output General-purpose digital I/O with port interrupt P2.0/TA1.1(4) 26 J5 E8 I/O TA1 CCR1 capture: CCI1A input, compare: Out1 output General-purpose digital I/O with port interrupt P2.1/TA1.2(4) 27 G6 D5 I/O TA1 CCR2 capture: CCI2A input, compare: Out2 output General-purpose digital I/O with port interrupt P2.2/UCB3SIMO/UCB3SDA (4) 28 J6 E7 I/O Slave in, master out – USCI_B3 SPI mode I2C data – USCI_B3 I2C mode General-purpose digital I/O with port interrupt Clock signal input – USCI_B3 SPI slave mode P2.3/UCB3SOMI/UCB3SCL(5) 29 H6 F8 I/O Clock signal output – USCI_B3 SPI master mode Slave transmit enable – USCI_A3 SPI mode General-purpose digital I/O with port interrupt Clock signal input – USCI_B3 SPI slave mode P2.4/UCB3CLK/UCA3STE(5) 30 J7 E6 I/O Clock signal output – USCI_B3 SPI master mode Slave transmit enable – USCI_A3 SPI mode General-purpose digital I/O with port interrupt Slave transmit enable – USCI_B3 SPI mode P2.5/UCB3STE/UCA3CLK(5) 31 J8 F7 I/O Clock signal input – USCI_A3 SPI slave mode Clock signal output – USCI_A3 SPI master mode General-purpose digital I/O with port interrupt P2.6/RTCCLK/DMAE0 (5) 32 J9 G8 I/O RTC clock output for calibration DMA external trigger input General-purpose digital I/O Slave transmit enable – USCI_B0 SPI mode P2.7/UCB0STE/UCA0CLK(5) 33 H7 F6 I/O Clock signal input – USCI_A0 SPI slave mode Clock signal output – USCI_A0 SPI master mode General-purpose digital I/O P3.0/UCB0SIMO/UCB0SDA (5) 34 H8 H8 I/O Slave in, master out – USCI_B0 SPI mode I2C data – USCI_B0 I2C mode General-purpose digital I/O P3.1/UCB0SOMI/UCB0SCL(5) 35 H9 G7 I/O Slave out, master in – USCI_B0 SPI mode I2C clock – USCI_B0 I2C mode (5) This pin function is supplied by DVIO. See Electrical Characteristics for input and output requirements. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 9 |
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