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MB90F583BPF Datasheet(PDF) 10 Page - Fujitsu Component Limited. |
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MB90F583BPF Datasheet(HTML) 10 Page - Fujitsu Component Limited. |
10 / 124 page MB90580B Series 10 *1: FPT-100P-M06 *2: FPT-100P-M05 (Continued) Pin no. Pin name Circuit type Function QFP*1 LQFP*2 14 12 P34 F (CMOS/H) General-purpose I/O port Functions as the HRQ pin in external bus mode if the HDE bit in the EPCR register is “1”. HRQ Functions as the hold request input pin (HRQ) in external bus mode. 15 13 P35 F (CMOS/H) General-purpose I/O port Functions as the HAK pin in external bus mode if the HDE bit in the EPCR register is “1”. HAK Functions as the hold acknowledge output pin (HAK) in external bus mode. 16 14 P36 F (CMOS/H) General-purpose I/O port Functions as the RDY pin in external bus mode if the RYE bit in the EPCR register is “1”. RDY Functions as the external ready input pin (RDY) in external bus mode. 17 15 P37 F (CMOS/H) General-purpose I/O port Functions as the CLK pin in external bus mode if the CKE bit in the EPCR register is “1”. CLK Functions as the machine cycle clock output pin (CLK) in external bus mode. 18 16 P40 E (CMOS/H) General-purpose I/O port. This pin serves as an open-drain output port with OD40 in the open- drain control setting register (ODR4) set to “1”. [The pin is disabled with the input setting (DDR4 register: D40=“0”).] SIN0 UART0 serial data input (SIN0) pin. When UART0 is operating for input, this input is used as required and thus the output from any other function to the pin must be off unless used intentionally. 19 17 P41 E (CMOS/H) General-purpose I/O port. This pin serves as an open-drain output port with OD41 in the open- drain control setting register (ODR4) set to “1”. [The pin is disabled with the input setting (DDR4 register: D41=“0”).] SOT0 UART0 serial data output pin (SOT0). This pin is enabled with the UART0 serial data output enabled. 20 18 P42 E (CMOS/H) General-purpose I/O port. This pin serves as an open-drain output port with OD42 in the open- drain control setting register (ODR4) set to “1”. [The pin is disabled with the input setting (DDR4 register: D42=“0”).] SCK0 UART0 serial clock I/O pin (SCK0). This pin is enabled with the UART0 clock output enabled. |
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