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MB90552APF Datasheet(PDF) 2 Page - Fujitsu Component Limited. |
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MB90552APF Datasheet(HTML) 2 Page - Fujitsu Component Limited. |
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2 / 58 page  MB90550A/550B Series 2 (Continued) • Instruction set designed for high level language (C) and multi-task operations Adoption of system stack pointer Symmetrical instruction set and barrel shift instructions • Integrated address match detection function (for two address pointers) • Faster execution speed: 4-byte queue • Powerful interrupt functions (Eight priority levels programmable) External interrupt inputs: 8 channels • Data transfer functions (Intelligent I/O service): Up to 16 channels DTP request inputs: 8 channels • Embedded ROM size (EPROM, Flash: 128 Kbytes) Mask ROM: 64 Kbytes/128 Kbytes • Embedded RAM size (EPROM, Flash: 4 Kbytes) Mask ROM: 2 Kbytes/4 Kbytes • General-purpose ports: Up to 83 channels (Input pull-up resistor settable for: 16 channels; Open drain settable for: 8 channels; I/O open drains: 6 chan- nels) • A/D converter (RC successive approximation type): 8 channels (Resolution: 8 or 10 bits selectable; Conversion time of 26.3 µs minimum) • UART: 1 channel • Extended I/O serial interface: 2 channels •I2C interface: 2 channels (Two channels, including one switchable between terminal input and output) • 16-bit reload timer: 2 channels • 8/16-bit PPG timer: 3 channels (8 bits × 2 channels; 16 bits x 1 channel: Mode switching function provided) • 16-bit I/O timer (Input capture × 4 channels, output compare × 4 channels, free run timer ×1 channel) • Clock monitor function integrated (Delivering the oscillation clock divided by 21 to 28) • Timebase timer/watchdog timer: 18 bits • Low power consumption modes (sleep, stop, hardware standby, and CPU intermittent operation modes) • Package: QFP-100, LQFP-100 •CMOS technology |
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