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MSP430G2X21 Datasheet(PDF) 4 Page - Texas Instruments |
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MSP430G2X21 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 58 page 1 2 3 4 5 6 7 8 9 RST/NMI/SBWTDIO 10 TEST/SBWTCK 11 XOUT/P2.7 12 XIN/P2.6/TA0.1 13 14 15 16 P1.0/TA0CLK/ACLK/A0 P1.1/TA0.0/A1 P1.2/TA0.1/A2 P1.3/ADC10CLK/A3/VREF-/VER EF- 1 DVCC 2 3 4 5 6 7 8 P1.6/TA0.1/A6/SDO/SCL/TDI/TCLK 9 P1.7/A7/SDI/SDA/TDO/TDI 10 RST/NMI/SBWTDIO 11 TEST/SBWTCK 12 XOUT/P2.7 13 XIN/P2.6/TA0.1 14 DVSS P1.0/TA0CLK/ACLK/A0 P1.1/TA0.0/A1 P1.2/TA0.1/A2 P1.3/ADC10CLK/A3/VREF-/VEREF- P1.4/SMCLK/A4/VREF+/VEREF+/TCK P1.5/TA0.0/A5/SCLK/TMS MSP430G2x31 MSP430G2x21 SLAS694J – FEBRUARY 2010 – REVISED FEBRUARY 2013 www.ti.com Device Pinout, MSP430G2x31 N OR PW PACKAGE (TOP VIEW) NOTE: See port schematics in Application Information for detailed I/O information. RSA PACKAGE (TOP VIEW) NOTE: See port schematics in Application Information for detailed I/O information. 4 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated |
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Similar Description - MSP430G2X21 |
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