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MSP430G2302IPW1EP Datasheet(PDF) 11 Page - Texas Instruments |
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MSP430G2302IPW1EP Datasheet(HTML) 11 Page - Texas Instruments |
11 / 52 page MSP430G2302-EP www.ti.com SLAS868A – JUNE 2012 – REVISED NOVEMBER 2012 Memory Organization Table 9. Memory Organization MSP430G2302 Memory Size 4kB Main: interrupt vector Flash 0xFFFF to 0xFFC0 Main: code memory Flash 0xFFFF to 0xF000 Information memory Size 256 Byte Flash 010FFh to 01000h RAM Size 256 B 0x02FF to 0x0200 Peripherals 16-bit 01FFh to 0100h 8-bit 0FFh to 010h 8-bit SFR 0Fh to 00h Flash Memory The flash memory can be programmed via the Spy-Bi-Wire/JTAG port or in-system by the CPU. The CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include: • Flash memory has n segments of main memory and four segments of information memory (A to D) of 64 bytes each. Each segment in main memory is 512 bytes in size. • Segments 0 to n may be erased in one step, or each segment may be individually erased. • Segments A to D can be erased individually or as a group with segments 0 to n. Segments A to D are also called information memory. • Segment A contains calibration data. After reset, segment A is protected against programming and erasing. It can be unlocked, but care should be taken not to erase this segment if the device-specific calibration data is required. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 11 |
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