MB90097-PFV datasheet(5/63 Pages) FUJITSU

Part #	MB90097-PFV

Description	ON-Screen Display Controller

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Manufacturer	FUJITSU [Fujitsu Component Limited.]

Direct Link	http://edevice.fujitsu.com/fmd/en/index.html

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5

MB90097

s PIN DESCRIPTIONS

Pin no.

Pin name

I/O

Function

1

SCLK

I

Shift clock input pin for serial transfer

This pin has an internal pull-up resistor.

2CS

I

Chip select pin

This pin inputs a Low level signal for serial transfer.

The pin has an internal pull-up resistor.

3

SIN

I

Serial data input pin

This pin has an internal pull-up resistor.

4

RESET

I

Reset input pin

This pin inputs a Low level signal when turning the power on.

5VDD

—

+ 3 V power supply pin

6

SDR

I

Data input direction select pin for serial transfer

This pin inputs the Low level signal in the LSB-first transfer mode for data

input; it inputs the High level signal in the MSB-first transfer mode.

7

8

XD

EXD

O

I

External circuit pins for display dot clock generator

Connect these pins to external “L” and “C” to form an LC oscillator circuit.

For external input of a display dot clock, input the clock signal to the EXD

pin and leave the XD pin open.

9

TEST

I

LSI test input pin

Input the Low level signal during normal use.

10

GND

—

Ground pin

20

HSYNC

I

Horizontal sync signal input pin

19

VSYNC

I

Vertical sync signal input pin

18

17

16

14

VC0

VC1

VC2

VC3

O

Color code signal output pin

15

BLKA

O

Display period signal output pin for output channel A

13

BLKB

O

Display period signal output pin for output channel B

11

BLKC

O

Display period signal output pin for output channel C

12

TESTO

O

LSI test output pin

Leave this pin open (unconnected) during normal use.

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MB90097-PFV Datasheet(PDF) 5 Page - Fujitsu Component Limited.

MB90097-PFV Datasheet(HTML) 5 Page - Fujitsu Component Limited.

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