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PT7M7809Y Datasheet(PDF) 6 Page - Pericom Semiconductor Corporation |
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PT7M7809Y Datasheet(HTML) 6 Page - Pericom Semiconductor Corporation |
6 / 12 page ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| PT0109S-15 10/14/10 6 PT7M7803/7809-7812/7823-7825 µP Supervisor Circuits Block Diagram V cc V RST 1.25V Watchdog Transition Detector Watchdog Timer WDI Timebase for Reset & Watchdog Reset Generator MR Vcc PFI RESET (RESET) PFO Functional Description Reset Output A microprocessor ( µP) reset input starts the µP in a known state. Whenever the µP is in an unknown state, it should be held in reset. The supervisory circuits assert reset during power-up and prevent code execution errors during power-down or brownout conditions. On power-up, once Vcc reaches about 1.0V, RESET is a guaranteed logic low of 0.4V or less. As Vcc rises, RESET stays low. When Vcc rises above the reset threshold, an internal timer releases RESET after about 200ms. RESET pulses low whenever Vcc drops below the reset threshold, i.e. brownout condition. If brownout occurs in the middle of a previously initiated reset pulse, the pulse continues for at least another 200ms. On power-down, once Vcc falls below the reset threshold, RESET stays low and is guaranteed to be 0.4V or less until Vcc drops below 1.0V. Watchdog Timing Diagram shows the timing relationship. The active-high RESET output is simply the inverse of the RESET output, and is guaranteed to be valid with Vcc down to 1.0V. Watchdog Timer The PT7M78xx watchdog circuit monitors the µP activity. If the µP does not toggle the watch-dog input (WDI) within 1.6s, reset asserts. As long as reset is asserted or the WDI input is toggled, the watchdog timer will stay clear and will not count. As soon as reset is released, the timer will start counting. WDI input pulses as short as 50ns can be detected. Disable the watchdog function by leaving WDI unconnected or by three-stating driver connected to WDI. Manual Reset The manual-reset input (MR) allows reset to be triggered by a push button switch. MR has an internal pullup resistor, so it can be left open when not used. Power-Fail Comparator The power-fail comparator can be used for various purposes because its output and noninverting input are not internally connected. The inverting input is internally connected to a 1.25V reference. 11-0012 |
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