MB88141

10

s

s

s

s

s

s

s ANALOG OUTPUT VOLTAGE RANGE

S6

"Start"

condition

Analog output

HiZ state

Load data

Load data

Digital input

HiZ input

HiZ state

"Acknowledge"

response

"Acknowledge"

response

"Acknowledge"

response

"Acknowledge"

response

"Stop"

condition

Delay

Delay

Data

change

12

3

4

5

6

7

8

9

10

DX

D7

D6

D5

D6

D0

D0

D7

D7

11

12

17

18

19

20

26

27

S5

S4

S3

S2

S1

S0 R/W ACK

ACK

ACK

C7

C6

C5

C0

D7

D6

D0

SDA

input

SCL

input

AO1 to

AO12

D0 to D7

output

D0 to D7

input

SDA

output

Note:

• The SDA input acknowledge response (ACK) is an output signal from the MB88141.

• The D0-D7 input and output timing represent the timing of switching to write and read operations respectively.

Also, D0-D7 input remains in HiZ state between the end of a read operation and the acknowledgment of the

next I/O write signal.

GND (

= VSS1, VSS2)

VCC (

= VDD1, VDD2)

VDD1 & VDD2

Operating amp circuit

Analog output range

R-2R ladder circuit

VSS1 & VSS2