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MB86434 Datasheet(PDF) 4 Page - Fujitsu Component Limited. |
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MB86434 Datasheet(HTML) 4 Page - Fujitsu Component Limited. |
4 / 38 page MB86434 4 (Continued) Pin No. Symbol I/O A/D Description 20 LO0 O D External control latch output pin. Outputs value D0 of address 1000. CMOS interface. 21 LO1 O D External control latch output pin. Outputs value D1 of address 1000. CMOS interface. 22 LO2 O D External control latch output pin. Outputs value D2 of address 1000. CMOS interface. 23 LO3 O D External control latch output pin. Outputs value D3 of address 1000. CMOS interface. 24 TCLK I D Tone generator clock input pin. Can be used as a tone CLK signal by using address 1110 D4D3 to subdivide the internal clock signal by factors of 1/1, 1/2, 1/4. CMOS interface. 25 TONC I D Tone generator cycle control input pin. CMOS interface. Hlevel signal outputs tone. 26 LED O D Ring LED control output pin. CMOS interface. 27 TENV I A Can be used to generate tone envelope, by placing capacitor between grounds and turning SW11 on/off. 28 SWO I/O A Analog switch 10 input/output pin. Controls address 0111 D0. 29 SWI I/O A Analog switch 10 input/output pin. 30 DSDT I A Accessory input. Can be connected to RAUD by switching paths. 31 TONEO O A Tone signal output pin. 32 RAUD O A Output pin for external speaker, or audio test signal. Can be connected to DSDT by switching paths. 33 VDDSP1 P A Speaker amp power supply pin. To be set within range 4.75 to 5.25 V. 34 JEAR O A Earphone speaker amp output pin. Capable of 5 mW output at 32 Ω load. 35 XEAR O A Receiver speaker amp output pin. Internally connected to EAR and BTL. Maximum output of 10 mW can be obtained at 32 W load by connecting speaker between EAR and XEAR. 36 EAR O A Receiver speaker amp output pin. Connected to XEAR and BTL. 37 SPG1 G A Speaker amp ground pin. To be set to 0 V. 38 SPG2 G A Speaker amp ground pin. To be set to 0 V. 39 XTONE O A Speaker amp tone output pin. Internally connected to TONE and BLT. Maximum output of 10 mW can be obtained at 32 Ω load by connecting speaker between TONE and XTONE. 40 TONE O A Speaker amp tone output pin. When speaker amp is not used for tone, TONE should be shorted to IMTON. 41 IMTON I A Speaker drive inverted (–) signal input pin. Can be used to adjust gain by connecting resistance to TONE and IMTON. 42 VDDSP2 P A Speaker amp power supply pin. To be set within range 4.75 to 5.25 V. |
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