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MB84VD2002-10 Datasheet(PDF) 3 Page - Fujitsu Component Limited. |
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MB84VD2002-10 Datasheet(HTML) 3 Page - Fujitsu Component Limited. |
3 / 30 page 3 MB84VD2002-10/MB84VD2003-10 s PIN ASSIGNMENTS (Top View) A B CDE F G H 6CE1sVSS DQ1 A1 A2 A4 CE2s A9 5A10 DQ5 DQ2 A0 A3 A7 RY/BY A14 4OE DQ7 DQ4 DQ0 A6 A18 RESET A15 3A11 A8 A5 DQ8 DQ3 DQ12 A12 BYTE 2A13 A17 SA* CEfDQ10 VCCfDQ6 DQ15/A-1 1WE VCCsA16 VSS DQ9 DQ11 DQ13 DQ14 Table 1 Pin Configuration Pin Function Input/ Output A0 to A16 Address Inputs (Common) I A-1, A17 to A18 Address Input (Flash) I SA Address Input (SRAM) I DQ0 to DQ7 Data Inputs/Outputs (Common) I/O DQ8 to DQ15 Data Inputs/Outputs (Flash) I/O CEf Chip Enable (Flash) I CE1s Chip Enable (SRAM) I CE2s Chip Enable (SRAM) I OE Output Enable (Common) I WE Write Enable (Common) I RY/BY Ready/Busy Outputs (Flash) O BYTE Selects 8-bit or 16-bit mode (Flash) I RESET Hardware Reset Pin/Sector Protection Unlock (Flash) I N.C. No Internal Connection — VSS Device Ground (Common) Power VCCf Device Power Supply (Flash) Power VCCs Device Power Supply (SRAM) Power *: A17 for SRAM |
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