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MB84VA2105-10 Datasheet(PDF) 3 Page - Fujitsu Component Limited. |
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MB84VA2105-10 Datasheet(HTML) 3 Page - Fujitsu Component Limited. |
3 / 29 page 3 MB84VA2104-10/MB84VA2105-10 s PIN ASSIGNMENTS (Top View) A B CDE F G H 6CE1sVSS DQ1 A1 A2 A4 CE2s A9 5A10 DQ5 DQ2 A0 A3 A7 RY/BY A15 4OE DQ7 DQ4 DQ0 A6 A19 RESET A16 3A11 A8 A5 N.C. DQ3 N.C. A13 A20 2A14 A18 N.C. CEfN.C. VCCfDQ6 A12 1WE VCCsA17 VSS N.C. N.C. N.C. N.C. Table 1 Pin Configuration Pin Function Input/ Output A0 to A16 Address Inputs (Common) I A17 to A20 Address Input (Flash) I DQ0 to DQ7 Data Inputs/Outputs (Common) I/O CEf Chip Enable (Flash) I CE1s Chip Enable (SRAM) I CE2s Chip Enable (SRAM) I OE Output Enable (Common) I WE Write Enable (Common) I RY/BY Ready/Busy Outputs (Flash) O RESET Hardware Reset Pin/Sector Protection Unlock (Flash) I N.C. No Internal Connection — VSS Device Ground (Common) Power VCCf Device Power Supply (Flash) Power VCCs Device Power Supply (SRAM) Power |
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