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MB81F643242C-10 Datasheet(PDF) 6 Page - Fujitsu Component Limited. |
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MB81F643242C-10 Datasheet(HTML) 6 Page - Fujitsu Component Limited. |
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6 / 56 page  6 MB81F643242C-60/-70/-10 Advanced Info (AE0.1E) s FUNCTIONAL TRUTH TABLE Note *1 COMMAND TRUTH TABLE Note *2, *3, and *4 Notes: *1. V = Valid, L = Logic Low, H = Logic High, X = either L or H. *2. All commands assumes no CSUS command on previous rising edge of clock. *3. All commands are assumed to be valid state transitions. *4. All inputs are latched on the rising edge of clock. *5. NOP and DESL commands have the same effect on the part. Unless specifically noted, NOP will represent both NOP and DESL command in later descriptions. *6. READ, READA, WRIT and WRITA commands should only be issued after the corresponding bank has been activated (ACTV command). Refer to “STATE DIAGRAM” in section “s FUNCTIONAL DESCRIPTION“. *7. ACTV command should only be issued after corresponding bank has been precharged (PRE or PALL command). *8. Required after power up. *9. MRS command should only be issued after all banks have been precharged (PRE or PALL command). Refer to “STATE DIAGRAM” in section “s FUNCTIONAL DESCRIPTION“. Function Notes Symbol CKE CS RAS CAS WE BA1, BA0 A10 (AP) A9 to A8 A7 to A0 n-1 n Device Deselect *5 DESL H X H X X X X X X X No Operation *5 NOP H X L H H H X X X X Burst Stop BST H X L H H L X X X X Read *6 READ H X L H L H V L X V Read with Auto-precharge *6 READA H X L H L H V H X V Write *6 WRIT H X L H L L V L X V Write with Auto-precharge *6 WRITA H X L H L L V H X V Bank Active *7 ACTV H X L L H H V V V V Precharge Single Bank PRE H X L L H L V L X X Precharge All Banks PALL H X L L H L X H X X Mode Register Set *8, *9 MRS H X L L L L L L V V |
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