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MB40C368 Datasheet(PDF) 2 Page - Fujitsu Component Limited. |
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MB40C368 Datasheet(HTML) 2 Page - Fujitsu Component Limited. |
2 / 10 page 2 MB40C368 s PIN ASSIGNMENT s PIN DESCRIPTION Values within ( ) are typical values. s NOTES ON USE • Be sure to bypass the AVDD, DVDD, VRT and VRB pins to the ground using a high-frequency capacitor. The high-frequency capacitor should be connected as near the pin as possible. • Provide four clocks or more immediately after the power up to prevent current dissipation due to the indeterminate internal logic. Pin No. Pin name Functions 1, 2, 16, 18 AVDD Analog power supply pins (+3 V) 13 DVDD Digital power supply pin (+3 V) 3, 15, 17, 24 AVSS Analog power ground pins (0 V) 12 DVSS Digital power ground pin (0 V) 4 to 11 D1 to D8 Digital output pins. D1: MSB, D8: LSB 14 CLK Clock input pin 21 VINA Analog input pin. Input range: VRB to VRT (2 Vp-p between 0.5 to 3 V) 19 VRT Reference voltage input pin (3 V) 23 VRB Reference voltage input pin (1 V) 22 VREFB Reference voltage output pin. When connected to VRB, the pin generates 0.33 × AVDD (1 V). 20 N. C. No connection pin. Should be connected to AVDD. (FPT-24P-M01) 1 2 3 4 5 6 22 21 20 19 18 17 7 8 9 10 16 15 14 13 (TOP VIEW) 11 12 24 23 AVDD AVDD AVSS (LSB) D8 D7 D6 D5 D4 D3 D2 (MSB) D1 DVSS AVSS VRB VREFB VINA N.C. VRT AVDD AVSS AVDD AVSS CLK DVDD (FPT-24P-M03) |
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