3

TRPEG1KVX-G MR CWDM

Oplink Communications, Inc

S0144, Rev.04. (web) 2013-05-16

Electrical Pad Layout

Host Board Connector Pad Layout

Bottom of Board

(as viewed thru top of board)

Top of Board

Toward

Bezel

Toward

ASIC

20

19

18

17

16

15

14

13

12

11

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

TX GND

TD- (TX DATAIN-)

TD+ (TX DATAIN+)

TX GND

VccTX

VccRX

RX GND

RD+ (RX DATA OUT+)

RD- (RX DATA OUT-)

RX GND

1

2

3

4

5

6

7

8

9

10

TX GND

TX Fault

TX Disable

MOD_DEF(2)

MOD_DEF(1)

MOD_DEF(0)

NO CONNECTION

LOS

RX GND

RX GND

Parameter

Symbol

Minimum

Typical

Maximum

Units

V

PP-DIFF

0.35

-

1.75

V

V

IH

2.0

-

V

CC

V

V

IL

0

-

0.8

V

V

OH

2.0

-

V

V

V

OL

0

-

0.8

V

1

Differential peak-to-peak voltage.

2

There is an internal 4.7 to 10kΩ pull-up resistor to VccT.

3

Open collector compatible, 4.7 to 10kΩ pull-up resistor to Vcc (Host Supply Voltage).

Parameter

Symbol

Minimum

Typical

Maximum

Units

V

PP-DIFF

0.4

-

1.75

V

V

OH

V

-

V

V

V

OL

0

-

0.5

V

1

Differential peak-to-peak voltage across external 100Ω load.

2

Open collector compatible, 4.7 to 10kΩ pull-up resistor to Vcc (Host Supply Voltage).

Parameter

Symbol

Minimum

Typical

Maximum

Units

Supply Voltage

V

CC

3.13

3.30

3.47

V

Supply Current

I

CC

-

210

300

mA

MOD_DEF(0)

pin 6

MOD_DEF(1)

pin 5

MOD_DEF(2)

pin 4

Interpretation by Host

TTL LOW

SCL

SDA

Serial module definition protocol

Module Definition