Oplink Communications, Inc.

Electrical Pad Layout

H ost B oard C onnector Pad Layout

Tow ard

B ezel

Tow ard

A SIC

20

19

18

17

16

15

14

13

12

11

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

TX G N D

TD - (TX D ATA IN -)

TD + (TX D ATA IN +)

TX G N D

VccTX

VccRX

RX G N D

RD + (RX D ATA OU T+)

RD - (RX D ATA OU T-)

RX G N D

Top of Board

1

2

3

4

5

6

7

8

9

10

TX G N D

TX Fault

TX D isable

MOD _D EF(2)

MOD _D EF(1)

MOD _D EF(0)

N O CON N ECTION

LOS

RX G N D

RX G N D

Bottom of Board

(as view ed thru top of board)

TR PEG1 K VX -E1 G

3

Parameter

Symbol

Minimum

Typical

Maximum

Units

V

PP-DIF

0.25

-

1.75

V

V

IH

2.0

-

V

CC

V

V

IL

0

-

0.8

V

V

OH

2.0

-

V

V

V

OL

0

-

0.8

V

1

D i erential peak-to-peak voltage.

2

There is an internal 4.7 to 10k pull-up resistor to VccT.

3

Open collector compatible,4.7 to 10k pull-up resistor to Vcc (H ost Supply Voltage).

Parameter

Symbol

Minimum

Typical

Maximum

Units

V

PP-DIF

0.4

-

1.75

V

V

OH

V

-

V

V

V

OL

0

-

0.5

V

1

D i erential peak-to-peak voltage across external 100 load.

2

Open collector compatible,4.7 to 10k pull-up resistor to Vcc (H ost Supply Voltage).

Parameter

Symbol

Minimum

Typical

Maximum

Units

Supply Voltage

V

CC

3.13

3.3

3.47

V

Supply Current

I

CC

-

210

300

mA

MO D _D EF(0)

pin 6

MO D _D EF(1)

pin 5

MO D _D EF(2)

pin 4

Interpretation by H ost

TTL LOW

SCL

SD A

Serial module definition protocol

Module D efinition

S0150,Rev.01

2009-07-20