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LP8755 Datasheet(PDF) 10 Page - Texas Instruments

Part # LP8755
Description  Multi-Phase 6-Core Step-Down Converter
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LP8755 Datasheet(HTML) 10 Page - Texas Instruments

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LP8755
SNVSA20 – NOVEMBER 2013
www.ti.com
6-PHASE BUCK SYSTEM CHARACTERISTICS (continued)
These specification limits are ensured by design proving the component values in the Figure 34 are used. Typical values and
limits appearing in normal type apply for TA = +25°C. Unless otherwise noted, VDDA5V = VINBxx = 3.7V; VIOSYS = VNRST = 1.8V,
VOUT = 1.1V. Limits appearing in boldface type apply over the entire ambient temperature range for operation, TA = –40°C to
+85°C.
(1)(2)(3)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DC load each phase
2500
IOUT
Output Current
mA
Six phases combined (6)
15000
Effective capacitance during operation, VOUT = 0.6V to
COUT
Output Capacitance
30
50
µF
1.67V, Min value over TA –40°C to +85°C
Input Capacitance on each
Effective capacitance during operation, 2.5V
≤ VINBxx ≤
CIN
2.5
10
µF
input voltage rail (7)
5.0V, Min value over TA –40°C to +85°C
L
Output Inductance
Effective inductance during operation
0.25
0.47
1.0
µH
IBALANCE
Current Balancing Accuracy
IOUT ≥ 1000 mA
< 10
%
GBW
Gain Bandwidth
1.2
MHz
COUT ESR = 10 mΩ
VRIPPLE_P
Output Voltage Ripple PWM
PWM mode, IOUT = 200 mA
7
mVPP
WM
Mode, One phase active(8)
Switching Frequency = 4.0 MHz
COUT ESR = 10 mΩ
VRIPPLE_PF
Output Voltage Ripple PFM
PFM mode
8
mVPP
M
Mode(8)
IOUT = 100 μA
COUT ESR = 10 mΩ
Output Voltage Ripple Low
VRIPPLE_LP
PFM Low Power mode
8
mVPP
Power(8)
IOUT = 100 μA
(6)
The power switches in the LP8755 are designed to operate continuously with currents up to the switch current limit thresholds. However,
when continuously operating at high current levels there will be significant heat generated within the IC and thus sustained total DC
current which the device can support is typically limited by thermal constraints. Thermal issues will become extremely important when
designing PWB and the thermal environment of the LP8755. PWB with high thermal efficiency is required to ensure the junction
temperature is kept below +125°C. Completing thermal analyses in early stages of the product design process is highly recommended
to predict thermal performance at board level. Under high current load conditions the serial bus master device must monitor the
temperature of the converter using the Thermal warning feature, see PROTECTION FEATURES CHARACTERISTICS. If the 2nd
thermal warning is triggered at 120°C, the application must quickly decrease the load current to keep the converter within its
recommended operating temperature.
(7)
In addition to these capacitors, at least one higher value capacitor like 22 µF should be placed close to the power pins. Note that cores
B0-B1 and B3-B4 do have combined power input pins
(8)
Ripple voltage should be measured at COUT electrode on a well-designed PC board, using suggested inductors and capacitors and with
a high-quality scope probe.
10
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Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: LP8755


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