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X5323S8IZ-2.7 Datasheet(PDF) 3 Page - Intersil Corporation |
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X5323S8IZ-2.7 Datasheet(HTML) 3 Page - Intersil Corporation |
3 / 20 page 3 FN8131.2 June 30, 2008 X5323V14-2.7A X5323 VAN X5325V14-2.7A X5325 VAN 2.7 to 5.5 2.85 to 3.0 0 to +70 14 Ld TSSOP X5323V14Z-2.7A (Note) X5323 VZAN X5325V14Z-2.7A (Note) X5325 VZAN 0 to +70 14 Ld TSSOP (Pb-free) X5323V14I-2.7A X5323 VAP X5325V14I-2.7A X5325 VAP -40 to +85 14 Ld TSSOP X5323V14IZ-2.7A (Note) X5323 VZAP X5325V14IZ-2.7A (Note) X5325 VZAP -40 to +85 14 Ld TSSOP (Pb-free) X5323P-2.7 X5323P F X5325P-2.7 X5325P F 2.7 to 5.5 2.55 to 2.7 0 to +70 8 Ld PDIP X5323PZ-2.7 (Note) X5323P ZF X5325PZ-2.7 X5325P ZF 0 to +70 8 Ld PDIP** (Pb-free) X5323PI-2.7 X5323P G X5325PI-2.7 X5325P G -40 to +85 8 Ld PDIP X5323PIZ-2.7 (Note) X5323P ZG X5325PIZ-2.7 X5325P ZG -40 to +85 8 Ld PDIP** (Pb-free) X5323S8-2.7* X5323 F X5325S8-2.7* X5325 F 0 to +70 8 Ld SOIC X5323S8Z-2.7* (Note) X5323 ZF X5325S8Z-2.7* (Note) X5325 ZF 0 to +70 8 Ld SOIC (Pb-free) X5323S8I-2.7* X5323 G X5325S8I-2.7* X5325 G -40 to +85 8 Ld SOIC X5323S8IZ-2.7* (Note) X5323 ZG X5325S8IZ-2.7* (Note) X5325 ZG -40 to +85 8 Ld SOIC (Pb-free) X5323V14-2.7* X5323 VF X5325V14-2.7* X5325 VF 0 to +70 14 Ld TSSOP X5323V14Z-2.7* (Note) X5323 VZF X5325V14Z-2.7* (Note) X5325 VZF 0 to +70 14 Ld TSSOP (Pb-free) X5323V14I-2.7* X5323 VG X5325V14I-2.7* X5325 VG -40 to +85 14 Ld TSSOP X5323V14IZ-2.7* (Note) X5323 VZG X5325V14IZ-2.7* (Note) X5325 VZG -40 to +85 14 Ld TSSOP (Pb-free) *Add “-T1” for tape and reel. Please refer to TB347 for details on reel specifications. **Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD- 020. Ordering Information (Continued) PART NUMBER RESET (ACTIVE LOW) PART MARKING PART NUMBER RESET (ACTIVE HIGH) PART MARKING VCC RANGE (V) VTRIP RANGE TEMP RANGE (°C) PACKAGE Pinouts X5323, X5325 (8 LD SOIC, PDIP) TOP VIEW X5323, X5325 (14 LD TSSOP) TOP VIEW CS/WDI WP SO 1 2 3 4 RESET/RESET 8 7 6 5 VCC VSS SCK SI SO WP VSS 1 2 3 4 5 6 7 SCK SI 14 13 12 11 10 9 8 NC VCC NC CS/WDI NC NC NC NC RESET/RESET X5323, X5325 |
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