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©2008 by RF Monolithics, Inc.

DR7000 - 4/8/08

Pin Descriptions

Pin

Name

In/Out

Description

1,4,20

GND

-

GND is the ground pin.

19

VCC

-

VCC is a positive supply voltage pin.

2

PKDET

Out

This pin is the peak detector output. A 0.022uF capacitor to ground (C5) sets the peak detector attack and

decay times, which have a fixed 1:1000 ratio. For most applications, these time constants should be coordi-

with variations in supply voltage, temperature, etc. The capacitor is driven from a 200 ohm “attack” source,

and decays through a 200 K load. The peak detector is used to drive the “dB-below-peak” data slicer and the

AGC release function. The peak detector capacitor is discharged in the receiver power-down (sleep) mode

and in the transmit modes. See the description of Pin 3 below for further information. A 0.022uF capacitor is

installed for operation at 4.8kbps.

3BBOUT

Out

This pin is connected directly to the transceiver BBOUT pin. This pin drives the CMPIN pin through a coupling

The nominal output impedance of this pin is 1 K.The BBOUT signal changes about 10 mV/dB, with a peak-to-

peak signal level of up to 450 mV. The signal at BBOUT is riding on a 1.5 Vdc value that varies somewhat

with supply voltage and temperature, so it should be coupled through a capacitor to an external load. When

an external data recovery process is used with AGC, BBOUT must be coupled to the external data recovery

process and CMPIN by separate series coupling capacitors. The output impedance of this pin becomes very

high in sleep mode, preserving the charge on the coupling capacitor.

The value of C3 on the circuit board has been chosen to match typical data encoding schemes at 4.8 kbps. If

C4 is modified to support higher data rates and/or different data encoding schemes and PK DET is being

5RXDATA

Out

RXDATA is the receiver data output pin. It is a CMOS output. The signal on this pin can come from one of two

sources. The default source is directly from the output of the data slicer circuit. The alternate source is from

the radio’s internal data and clock recovery circuit. When the internal data and clock recovery circuit is used,

the signal on RXDATA is switched from the output of the data slicer to the output of the data and clock recov-

ery circuit when a packet start symbol is detected. Each recovered data bit is then output on the rising edge of

a RXDCLK pulse (Pin 16), and is stable for reading on the falling edge of the RXDCLK pulse.

6

TXMOD

In

The transmitter RF output voltage is proportional to the input current to this pin. A resistor in series with the

TXMOD input is normally used to adjust the peak transmitter output. Full transmitter power (10 mW) requires

The practical power control range is 10 to -50 dBm. A ±5% TXMOD resistor value is recommended. Internally,

this pin is connected to the base of a bipolar transistor with a small emitter resistor. The voltage at the

TXMOD input pin is about 0.85 volt with 235 uA of drive current. This pin accepts analog modulation and can

be driven with either logic level data pulses (unshaped) or shaped data pulses.

A series 9.1 kilohm resistor is installed to provide +10dBm average output power with a +3Vdc input.

7LPFADJ

In

between this pin and ground. The resistor value can range from 510 K to 3 K, providing a filter 3 dB bandwidth

A ±5% resistor should be used to set the filter bandwidth. This will provide a 3 dB filter bandwidth between

degree equiripple phase response. A 470 kilohm resistor to GND is installed to provide a 3dB filter band-

width of 5.275kHz. Connect an external ±1%, 243kilohm resistor to GND for 19.2kbps operation.

8TX/RX

In

Logic Input (CMOS compatible). This pin, in 3G mode, selects the operation of the TR7000 . Pull this pin

‘High’ for Transmit Mode. Pull this pin ‘Low’ for Receive mode. Do not allow this pin to float.

9

OOK/ASK

In

Logic Input (CMOS compatible). This pin, in 3G mode, selects the operation of the TR7000. Pull this pin

‘High’ for OOK Transmit/Receive mode. Pull this pin ‘Low’ for ASK Transmit/Receive mode. Do not allow this

pin to float.