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LM5050-1 Datasheet(PDF) 11 Page - Texas Instruments |
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LM5050-1 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 21 page PS1 PS2 IN GATE OUT IN GATE OUT RLOAD CLOAD LM5050-1 LM5050-1 GND GND COUT VS VS LM5050-1, LM5050-1-Q1 www.ti.com SNVS629D – MAY 2011 – REVISED JUNE 2013 If the MOSFET current decreases to the point that the voltage across the MOSFET falls below the VSD(REG) voltage regulation point of 27 mV (typical), the GATE pin voltage will be decreased until the voltage across the MOSFET is regulated at 22 mV. If the drain-to-source voltage is greater than VSD(REG) voltage the gate-to-source will increase, eventually reaching the 12V GATE to IN zener clamp level. If the MOSFET current reverses, possibly due to failure of the input supply, such that the voltage across the LM5050-1 IN and OUT pins is more negative than the VSD(REV) voltage of -28 mV (typical), the LM5050-1 will quickly discharge the MOSFET gate through a strong GATE to IN pin discharge transistor. If the input supply fails abruptly, as would occur if the supply was shorted directly to ground, a reverse current will temporarily flow through the MOSFET until the gate can be fully discharged. This reverse current is sourced from the load capacitance and from the parallel connected supplies. The LM5050-1 responds to a voltage reversal condition typically within 25 ns. The actual time required to turn off the MOSFET will depend on the charge held by gate capacitance of the MOSFET being used. A MOSFET with 47 nF of effective gate capacitance can be turned off in typically 180 ns. This fast turn off time minimizes voltage disturbances at the output, as well as the current transients from the redundant supplies. VS PIN The LM5050-1 VS pin is the main supply pin for all internal biasing and an auxiliary supply for the internal gate drive charge pump. For typical LM5050-1 applications, where the input voltage is above 5.0V, the VS pin can be connected directly to the OUT pin. In situations where the input voltage is close to, but not less than, the 5.0V minimum, it may be helpful to connect the VS pin to the OUT pin through an RC Low-Pass filter to reduce the possibility of erratic behavior due to spurious voltage spikes that may appear on the OUT and IN pins. The series resistor value should be low enough to keep the VS voltage drop at a minimum. A typical series resistor value is 100 Ω. The capacitor value should be the lowest value that produces acceptable filtering of the voltage noise. Alternately, it is possible to operate the LM5050-1 with VIN values less than 1V if the VS pin is powered from a separate supply. This separate VS supply must be between 5.0V and 75V. See Figure 28. OFF PIN The OFF pin is a logic level input pin that is used to control the gate drive to the external MOSFET. The maximum operating voltage on this pin is 5.5V. When the OFF pin is high, the MOSFET is turned off (independent of the sensed IN and OUT voltages). In this mode, load current will flow through the body diode of the MOSFET. The voltage difference between the IN pin and OUT pins will be approximately 700 mV if the MOSFET is operating normally through the body diode. The OFF pin has an internal pull-down of 5 µA (typical). If the OFF function is not required the pin may be left open or connected to ground. Figure 26. Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LM5050-1 LM5050-1-Q1 |
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