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FA13844N Datasheet(PDF) 10 Page - Fuji Electric |
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FA13844N Datasheet(HTML) 10 Page - Fuji Electric |
10 / 15 page FA13842, 13843, 13844, 13845 10 Fig. 8 Fig. 10 Fig. 9 Tr1 + ~ ~ + + C1 DB R1 AC INPUT R4 D4 R3 Tr2 Latching signal ER AMP 30V 2R 1R + C2 D1 MOSFET T1 OSC REF 7 8 4 2 1 5 + + 7 8 4 2 1 5 SCR1 ER AMP 2R 1R 30V Latching signal OSC REF R5 C5 SCR2 Latching signal ER AMP 2R 1R 30V OSC REF 8 7 4 2 1 5 3. Latched shutdown A typical circuit for latched shutdown is shown in Fig. 8. The voltage of the OUT terminal is kept low if the voltage of the COMP terminal is low. The voltage of the COMP terminal must be set at 0.7V or less in the application temperature range. (See characteristic curve on page 46 ”COMP to ISNS offset voltage vs temperature”.) The source current from the COMP terminal is less than about 1.3mA. Use of a thyristor such as that shown in Fig. 9 is not effective because the saturation voltage of the thyristor is higher than 0.7V. When a thyristor is used, increase the voltage of the FB terminal to more than 3V as shown in Fig.10. In the case of a latched shutdown, it is necessary to supply a current larger than the hold current of the thyristor structure circuit or of the thyristor. This current should be provided through a start-up resistor from the AC input. Latched shutdown with a thyristor using the COMP terminal is not effective. |
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