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ADC14C080 Datasheet(PDF) 4 Page - Texas Instruments |
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ADC14C080 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 30 page DRGND VDR DGND VA ADC14C080 SNAS375B – SEPTEMBER 2006 – REVISED AUGUST 2007 www.ti.com Pin Descriptions and Equivalent Circuits (continued) Pin No. Symbol Equivalent Circuit Description Digital data output pins that make up the 14-bit conversion result. D0 13-19, D0–D13 (pin 13) is the LSB, while D13 (pin 29) is the MSB of the output 23-29 word. Output levels are CMOS compatible. Data Ready Strobe. The data output transition is synchronized with 21 DRDY the falling edge of this signal. This signal switches at the same frequency as the CLK input. ANALOG POWER Positive analog supply pins. These pins should be connected to a 3, 8, 10 VA quiet voltage source and be bypassed to AGND with 0.1 µF capacitors located close to the power pins. The ground return for the analog supply. 4, 7, 9, AGND The exposed pad on back of package must be soldered to ground Exposed Pad plane to ensure rated performance. DIGITAL POWER Positive driver supply pin for the output drivers. This pin should be 20 VDR connected to a quiet voltage source and be bypassed to DRGND with a 0.1 µF capacitor located close to the power pin. The ground return for the digital output driver supply. This pins 22 DRGND should be connected to the system digital ground, but not be connected in close proximity to the ADC's AGND pins. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 4 Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: ADC14C080 |
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