V

COM

OUT1

OUT2

OUT3

OUT4

GND

A

(1)

V

S

V

SD

SDA

V

COM-FB

V

S

OUT8

OUT7

OUT6

GND

D

(1)

BKSEL

A0

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

PowerPAD

Lead-Frame

DiePad

Exposedon

Underside

(mustconnectto

GND andGND )

A

D

SCL

OUT5

GND

A

(1)

14

13

12

11

BUF08832

SBOS476C

– AUGUST 2009 – REVISED JULY 2011

www.ti.com

PIN CONFIGURATION

PWP PACKAGE

HTSSOP-20

(TOP VIEW)

PIN DESCRIPTIONS

PIN #

NAME

DESCRIPTION

1

2

3

OUT1

DAC output 1

4

OUT2

DAC output 2

5

OUT3

DAC output 3

6

OUT4

DAC output 4

7

8

Digital supply; connect to logic supply

9

SCL

Serial clock input; open-drain, connect to pull-up resistor.

10

SDA

Serial data I/O; open-drain, connect to pull-up resistor.

11

A0

A0 address pin for Two-Wire address; connect to either logic 1 or logic 0. See Table 1.

12

BKSEL

Selects memory bank 0 or 1; connect to either logic 1 to select bank 1 or logic 0 to select bank 0.

13

Digital ground; must be connected to analog ground at the BUF08832.

14

15

OUT5

DAC output 5

16

OUT6

DAC output 6

17

OUT7

DAC output 7

18

OUT8

DAC output 8

19

20

4

Copyright

© 2009–2011, Texas Instruments Incorporated