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BUF12800 Datasheet(PDF) 10 Page - Texas Instruments |
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BUF12800 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 31 page V =V ´ OUT S CODE 10 1024 BUF08832 SBOS476C – AUGUST 2009 – REVISED JULY 2011 www.ti.com DATA RATES OUTPUT VOLTAGE The two-wire bus operates in one of three speed Buffer output values are determined by the analog modes: supply voltage (VS) and the decimal value of the binary input code used to program that buffer. The • Standard: allows a clock frequency of up to value is calculated using Equation 1: 100kHz; • Fast: allows a clock frequency of up to 400kHz; and (1) • High-speed mode (also called Hs mode): allows a clock frequency of up to 3.4MHz. The BUF08832 outputs are capable of a full-scale voltage output change in typically 5 μs; no The BUF08832 is fully compatible with all three intermediate steps are required. modes. No special action is required to use the device in Standard or Fast modes, but High-speed UPDATING THE DAC OUTPUT VOLTAGES mode must be activated. To activate High-speed mode, send a special address byte of 00001 xxx, with Because the BUF08832 features a double-buffered SCL ≤ 400kHz, following the START condition; where register structure, updating the digital-to-analog xxx are bits unique to the Hs-capable master, which converter (DAC) and/or the VCOM register is not the can be any value. This byte is called the Hs master same as updating the DAC and/or VCOM output code. Table 2 provides a reference for the voltage. There are two methods for updating the High-speed mode command code. (Note that this DAC/VCOM output voltages. configuration is different from normal address Method 1: Method 1 is used when it is desirable to bytes —the low bit does not indicate read/write have the DAC/VCOM output voltage change status.) The BUF08832 responds to the High-speed immediately after writing to a DAC register. For each command regardless of the value of these last three write transaction, the master sets data bit 15 to a '1'. bits. The BUF08832 does not acknowledge this byte; The DAC/VCOM output voltage update occurs after the communication protocol prohibits receiving the 16th data bit for the currently-written acknowledgment of the Hs master code. Upon register. receiving a master code, the BUF08832 switches on its Hs mode filters, and communicates at up to Method 2: Method 2 is used when it is desirable to 3.4MHz. Additional high-speed transfers may be have all DAC/VCOM output voltages change at the initiated without resending the Hs mode byte by same time. First, the master writes to the desired generating a repeat START without a STOP. The DAC/VCOM channels with data bit 15 a '0'. Then, BUF08832 switches out of Hs mode with the next when writing the last desired DAC/VCOM channel, the STOP condition. master sets data bit 15 to a '1'. All DAC/VCOM channels are updated at the same time after GENERAL-CALL RESET AND POWER-UP receiving the 16th data bit. The BUF08832 responds to a General-Call Reset, NONVOLATILE MEMORY which is an address byte of 00h (0000 0000) followed by a data byte of 06h (0000 0110). The BUF08832 BKSEL Pin acknowledges both bytes. Table 2 provides a reference for the General-Call Reset command code. The BUF08832 has 16x rewrite capability of the Upon receiving a General-Call Reset, the BUF08832 nonvolatile memory. Additionally, the BUF08832 has performs a full internal reset, as though it had been the ability to store two distinct gamma curves in two powered off and then on. It always acknowledges the different nonvolatile memory banks, each of which General-Call address byte of 00h (0000 0000), but has 16x rewrite capability. One of the two available does not acknowledge any General-Call data bytes banks is selected using the external input pin, other than 06h (0000 0110). BKSEL. When this pin is low, BANK0 is selected; when this pin is high, BANK1 is selected. When the BUF08832 powers up, it automatically performs a reset. As part of the reset, the BUF08832 is configured for all outputs to change to the last programmed nonvolatile memory values, or 1000000000 if the nonvolatile memory values have not been programmed. 10 Copyright © 2009–2011, Texas Instruments Incorporated |
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