Dual Full-Bridge PWM Motor Driver

A3966

6

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Internal PWM Current Control.

The A3966 dual full-

bridges are designed to drive both windings of a bipolar

stepper motor. Load current can be controlled in each motor

winding by an internal fixed-frequency PWM control cir-

cuit. The current-control circuitry works as follows: when

the outputs of the full-bridge are turned on, current increas-

es in the motor winding. The load current is sensed by the

current-control comparator via an external sense resistor

the predetermined value, set by the selection of external

according to the equation:

to the base-drive current of the sink driver transistor.

At the trip point, the comparator resets the source-en-

able latch, turning off the source driver of that full-bridge.

The source turn-off of one full-bridge is independent of

the other full-bridge. Load inductance causes the current to

recirculate through the sink driver and ground-clamp diode.

The current decreases until the internal clock oscillator sets

the source-enable latches of both Full-bridges, turning on

the source drivers of both bridges. Load current increases

again, and the cycle is repeated.

The frequency of the internal clock oscillator is set by

be approximately calculated as:

20 to 100 k

 and 470 to 1000 pF respectively. Nominal

values of 56 k

 and 680 pF result in a clock frequency of

25 kHz.

Current-Sense Comparator Blanking.

When the

source driver is turned on, a current spike occurs due to the

reverse-recovery currents of the clamp diodes and switch-

ing transients related to distributed capacitance in the load.

To prevent this current spike from erroneously resetting the

source enable latch, the current-control comparator output

is blanked for a short period of time when the source driver

is turned on. The blanking time is set by the timing compo-

of 1.3 μs.

The current-control comparator is also blanked when

the Full-bridge outputs are switched by the PHASE or

ENABLE inputs. This internally generated blank time is

approximately 1 μs.

FUNCTIONAL DESCRIPTION

+

–

0

Dwg. WM-003-2

I

OUT

t

d

t

blank

INTERNAL

OSCILLATOR

BRIDGE

ON

SOURCE

OFF

BRIDGE

ON

R C

T T

ALL

OFF

Enlargement A

See Enlargement A

Dwg. EP-006-16

R S

BB

V

BRIDGE ON

SOURCE OFF

ALL OFF