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ACT8933QJ133-T Datasheet(PDF) 9 Page - Active-Semi, Inc |
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ACT8933QJ133-T Datasheet(HTML) 9 Page - Active-Semi, Inc |
9 / 44 page ACT8933 Rev 3, 15-Nov-12 - 9 - www.active-semi.com ActivePMU TM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP. Copyright © 2012 Active-Semi, Inc. Innovative PowerTM Active-Semi Proprietary―For Authorized Recipients and Customers OUTPUT ADDRESS D7 D6 D5 D4 D3 D2 D1 D0 SYS 0x00 NAME TRST nSYSMODE nSYSLEVMSK nSYSSTAT SYSLEV[3] SYSLEV[2] SYSLEV[1] SYSLEV[0] DEFAULT 1 1 0 R 0 1 1 1 SYS 0x01 NAME Reserved Reserved Reserved Reserved SCRATCH SCRATCH SCRATCH SCRATCH DEFAULT 0 0 0 0 0 0 0 0 REG1 0x20 NAME Reserved Reserved VSET1[5] VSET1[4] VSET1[3] VSET1[2] VSET1[1] VSET1[0] DEFAULT 0 0 0 1 1 0 0 0 REG1 0x21 NAME Reserved Reserved VSET2[5] VSET2[4] VSET2[3] VSET2[2] VSET2[1] VSET2[0] DEFAULT 0 0 0 1 1 0 0 0 REG1 0x22 NAME ON PHASE MODE DELAY[2] DELAY[1] DELAY[0] nFLTMSK OK DEFAULT 0 0 0 0 0 0 0 R REG2 0x30 NAME Reserved Reserved VSET1[5] VSET1[4] VSET1[3] VSET1[2] VSET1[1] VSET1[0] DEFAULT 0 0 1 0 0 1 0 0 REG2 0x31 NAME Reserved Reserved VSET2[5] VSET2[4] VSET2[3] VSET2[2] VSET2[1] VSET2[0] DEFAULT 0 0 1 0 0 1 0 0 REG2 0x32 NAME ON PHASE MODE DELAY[2] DELAY[1] DELAY[0] nFLTMSK OK DEFAULT 0 0 0 0 0 0 0 R REG3 0x40 NAME Reserved Reserved VSET1[5] VSET1[4] VSET1[3] VSET1[2] VSET1[1] VSET1[0] DEFAULT 0 0 1 1 0 1 1 1 REG3 0x41 NAME Reserved Reserved VSET2[5] VSET2[4] VSET2[3] VSET2[2] VSET2[1] VSET2[0] DEFAULT 0 0 1 1 0 1 1 1 REG3 0x42 NAME ON Reserved MODE DELAY[2] DELAY[1] DELAY[0] nFLTMSK OK DEFAULT 0 0 0 0 0 0 0 R REG4 0x50 NAME Reserved Reserved VSET[5] VSET[4] VSET[3] VSET[2] VSET[1] VSET[0] DEFAULT 0 0 0 1 1 0 0 0 REG4 0x51 NAME ON DIS LOWIQ DELAY[2] DELAY[1] DELAY[0] nFLTMSK OK DEFAULT 0 1 0 0 0 0 0 R REG5 0x54 NAME Reserved Reserved VSET[5] VSET[4] VSET[3] VSET[2] VSET[1] VSET[0] DEFAULT 0 0 1 1 0 1 1 1 REG5 0x55 NAME ON DIS LOWIQ DELAY[2] DELAY[1] DELAY[0] nFLTMSK OK DEFAULT 0 1 0 0 0 0 0 R REG6 0x60 NAME Reserved Reserved VSET[5] VSET[4] VSET[3] VSET[2] VSET[1] VSET[0] DEFAULT 0 0 1 0 0 1 0 0 REG6 0x61 NAME ON DIS LOWIQ DELAY[2] DELAY[1] DELAY[0] nFLTMSK OK DEFAULT 0 1 0 0 0 0 0 R REG7 0x64 NAME Reserved Reserved VSET[5] VSET[4] VSET[3] VSET[2] VSET[1] VSET[0] DEFAULT 0 0 1 1 0 1 1 1 REG7 0x65 NAME ON DIS LOWIQ DELAY[2] DELAY[1] DELAY[0] nFLTMSK OK DEFAULT 0 1 0 0 0 0 0 R APCH 0x70 NAME Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved DEFAULT 0 1 0 1 0 0 0 0 APCH 0x71 NAME SUSCHG Reserved TOTTIMO[1] TOTTIMO[0] PRETIMO[1] PRETIMO[0] OVPSET[1] OVPSET[0] DEFAULT 0 0 1 0 1 0 0 0 APCH 0x78 NAME TIMRSTAT TEMPSTAT INSTAT CHGSTAT TIMRDAT TEMPDAT INDAT CHGDAT DEFAULT 0 0 0 0 R R R R APCH 0x79 NAME TIMRTOT TEMPIN INCON CHGEOCIN TIMRPRE TEMPOUT INDIS CHGEOCOUT DEFAULT 0 0 0 0 0 0 0 0 APCH 0x7A NAME Reserved Reserved CSTATE[0] CSTATE[1] Reserved Reserved ACINSTAT Reserved DEFAULT 0 0 R R R R R R BITS GLOBAL REGISTER MAP : Default values of ACT8933QJ133-T. 2 : All bits are automatically cleared to default values when the input power is removed or falls below the system UVLO. |
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