ACT8828QJ1D2-T datasheet(5/51 Pages) ACTIVE-SEMI

Part #	ACT8828QJ1D2-T

Description	Six Channel ActivePathTM Power Management IC

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Manufacturer	ACTIVE-SEMI [Active-Semi, Inc]

Direct Link	http://www.active-semi.com

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5 / 51 page

ACT8828

Rev 7, 15-Nov-12

Innovative Power

TM

- 5 -

www.active-semi.com

ActivePMU

TM and ActivePathTM are trademarks of Active-Semi.

I

2CTM is a trademark of NXP.

PIN DESCRIPTIONS

NAME

DESCRIPTION

1

TH

Temperature Sensing Input. Connect to battery thermistor. TH is pulled up with a 100µA current

internally. See the Battery Temperature Monitoring section for more information.

2

DCCC

Dynamic Charging Current Control. Connect a resistor to set the dynamic charging current control

point. A internal 100µA current source sets up a voltage that is used to compare with VSYS and

dynamically scale the charging current to maintain VSYS regulation. See the Dynamic Charge

Current Control

section for more information.

3

BTR

Safety Timer Program Pin. The resistance between this pin and GA determines the timers timeout

values. See the Charging Safety Timers section for more information.

4

ACIN

AC Adaptor Detect. Detects presence of a wall adaptor and automatically adjusts the charge

current to the maximum charge current level. Do not leave ACIN floating.

5, 6

BAT

Battery Charger Output. Connect this pin directly to the battery anode (+ terminal)

7, 8

VSYS

System Output Pin. Bypass to GA with a 10µF or larger ceramic capacitor.

9

CHG_IN

Power Input for the Battery Charger. Bypass CHG_IN to GA with a capacitor placed as close to

the IC as possible. The battery charger are automatically enabled when a valid voltage is present

on CHG_IN.

10

ISET

Charge Current Set. Program the maximum charge current by connecting a resistor (RISET) between

ISET and GA. See the Charger Current Programming section for more information.

11

VSEL

Step-Down DC/DCs Output Voltage Selection. Drive to logic low to select default output voltage.

Drive to logic high to select secondary output voltage. See the Output Voltage Selection Pin

section for more information.

12

ON1

Independent Enable Control Input for REG1. Drive ON1 to VSYS or to a logic high for normal

operation, drive to GA or a logic low to disable REG1. Do not leave ON1 floating.

13

OUT2

Output Feedback Sense for REG2. Connect this pin directly to the output node to connect the

internal feedback network to the output voltage.

14

VP2

Power Input for REG2. Bypass to GP2 with a high quality ceramic capacitor placed as close as

possible to the IC.

15

SW2

Switching Node Output for REG2. Connect this pin to the switching end of the inductor.

16

GP2

Power Ground for REG2. Connect GA, GP1, GP2, GP3, and GP4 together at a single point as

close to the IC as possible.

17

GP1

Power Ground for REG1. Connect GA, GP1, GP2, GP3, and GP4 together at a single point as

close to the IC as possible.

18

SW1

Switching Node Output for REG1. Connect this pin to the switching end of the inductor.

19

VP1

Power Input for REG1. Bypass to GP1 with a high quality ceramic capacitor placed as close as

possible to the IC.

20

OUT1

Output Feedback Sense for REG1. Connect this pin directly to the output node to connect the

internal feedback network to the output voltage.

21

ON3

Enable Control Input for REG3. Drive ON3 to a logic high for normal operation, drive to GA or a

logic low to disable REG3. Do not leave ON3 floating.

22

SCL

Clock Input for I2C Serial Interface.

23

SDA

Data Input for I2C Serial Interface. Data is read on the rising edge of SCL.

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