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ADS6143IRHB25 Datasheet(PDF) 4 Page - Texas Instruments |
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ADS6143IRHB25 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 67 page www.ti.com RECOMMENDED OPERATING CONDITIONS ADS6145, ADS6144 ADS6143, ADS6142 SLWS198B – JULY 2007 – REVISED MARCH 2008 over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT SUPPLIES AVDD Analog supply voltage 3 3.3 3.6 V CMOS Interface 1.65 1.8 to 3.3 3.6 V DRVDD Output buffer supply voltage(1) LVDS Interface 3 3.3 3.6 V ANALOG INPUTS Differential input voltage range 2 Vpp VIC Input common-mode voltage 1.5 ± 0.1 V Voltage applied on VCM in external reference mode 1.45 1.5 1.55 V CLOCK INPUT ADS6145 1 125 ADS6144 1 105 Input clock sample rate, FS MSPS ADS6143 1 80 ADS6142 1 65 Sine wave, ac-coupled 0.4 1.5 LVPECL, ac-coupled ± 0.8 Input clock amplitude differential Vpp (VCLKP – VCLKM) LVDS, ac-coupled ± 0.35 LVCMOS, ac-coupled 3.3 Input Clock duty cycle 35% 50% 65% DIGITAL OUTPUTS DEFAULT For CLOAD ≤ 5 pF and DRVDD ≥ 2.2 V strength MAXIMUM Output buffer drive strength (2) For CLOAD > 5 pF and DRVDD ≥ 2.2 V strength MAXIMUM For DRVDD < 2.2 V strength CMOS Interface, maximum buffer strength 10 Maximum external load capacitance from CLOAD LVDS Interface, without internal termination 5 pF each output pin to DRGND LVDS Interface, with internal termination 10 RLOAD Differential load resistance (external) between the LVDS output pairs 100 Ω TA Operating free-air temperature -40 85 °C (1) For easy migration to next generation, higher sampling speed devices (> 125 MSPS), use 1.8V DRVDD supply. (2) See Output Buffer Strength Programmability in the application section. 4 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): ADS6145, ADS6144 ADS6143, ADS6142 |
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